From: Mary Date: Fri, 11 Aug 2023 10:18:47 +0000 (+0200) Subject: agx: Move nir_lower_fragcolor out of agx_preprocess_nir X-Git-Tag: upstream/23.3.3~3443 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=0f4e3a03fd8729ff97df82c1bc29988d41b0beae;p=platform%2Fupstream%2Fmesa.git agx: Move nir_lower_fragcolor out of agx_preprocess_nir Do not apply "nir_lower_fragcolor" in the common code. This fix a crash on agxv side when a frag shader have SSBO writes. This is caused by "nir_lower_frag_color" assuming that every "store_deref" will have a variable backing the output. Signed-off-by: Mary Part-of: --- diff --git a/src/asahi/compiler/agx_compile.c b/src/asahi/compiler/agx_compile.c index ec5253f..ae6acbd 100644 --- a/src/asahi/compiler/agx_compile.c +++ b/src/asahi/compiler/agx_compile.c @@ -2581,12 +2581,6 @@ agx_preprocess_nir(nir_shader *nir, bool support_lod_bias, bool allow_mediump, if (nir->info.stage == MESA_SHADER_VERTEX) { NIR_PASS_V(nir, nir_lower_point_size, 1.0, 0.0); - } else if (nir->info.stage == MESA_SHADER_FRAGMENT) { - /* Lower to maximum colour buffers, the excess stores will get cleaned up - * by tilebuffer lowering so they won't become real shader code. However, - * that depends on the shader key which we don't have at this point. - */ - NIR_PASS_V(nir, nir_lower_fragcolor, 8); } /* Lower large arrays to scratch and small arrays to csel */ diff --git a/src/gallium/drivers/asahi/agx_state.c b/src/gallium/drivers/asahi/agx_state.c index dddaedc..8f5197b 100644 --- a/src/gallium/drivers/asahi/agx_state.c +++ b/src/gallium/drivers/asahi/agx_state.c @@ -1721,6 +1721,14 @@ agx_shader_initialize(struct agx_device *dev, struct agx_uncompiled_shader *so, */ NIR_PASS_V(nir, agx_nir_lower_bindings, &so->internal_bindless); + if (nir->info.stage == MESA_SHADER_FRAGMENT) { + /* Lower to maximum colour buffers, the excess stores will get cleaned up + * by tilebuffer lowering so they won't become real shader code. However, + * that depends on the shader key which we don't have at this point. + */ + NIR_PASS_V(nir, nir_lower_fragcolor, 8); + } + bool allow_mediump = !(dev->debug & AGX_DBG_NO16); agx_preprocess_nir(nir, true, allow_mediump, &so->info);