From: Paul Mundt Date: Mon, 7 Nov 2005 08:58:28 +0000 (-0800) Subject: [PATCH] sh: Use pfn_valid() for lazy dcache write-back on SH7705 X-Git-Tag: v3.12-rc1~41199 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=0d6d82b6712c808e461090dd483f111f72b3b38b;p=kernel%2Fkernel-generic.git [PATCH] sh: Use pfn_valid() for lazy dcache write-back on SH7705 SH7705 in extended cache mode has some left-over VALID_PAGE() cruft that it checks when doing lazy dcache write-back. This has been gone for some time (the last bits were in the discontig code, which should now also be gone -- this also fixes up a build error in the non-discontig case). pfn_valid() gives the desired behaviour, so we switch to that. Signed-off-by: Paul Mundt Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- diff --git a/arch/sh/mm/tlb-sh3.c b/arch/sh/mm/tlb-sh3.c index 7a0d5c1..46b09e2 100644 --- a/arch/sh/mm/tlb-sh3.c +++ b/arch/sh/mm/tlb-sh3.c @@ -40,12 +40,17 @@ void update_mmu_cache(struct vm_area_struct * vma, return; #if defined(CONFIG_SH7705_CACHE_32KB) - struct page *page; - page = pte_page(pte); - if (VALID_PAGE(page) && !test_bit(PG_mapped, &page->flags)) { - unsigned long phys = pte_val(pte) & PTE_PHYS_MASK; - __flush_wback_region((void *)P1SEGADDR(phys), PAGE_SIZE); - __set_bit(PG_mapped, &page->flags); + { + struct page *page = pte_page(pte); + unsigned long pfn = pte_pfn(pte); + + if (pfn_valid(pfn) && !test_bit(PG_mapped, &page->flags)) { + unsigned long phys = pte_val(pte) & PTE_PHYS_MASK; + + __flush_wback_region((void *)P1SEGADDR(phys), + PAGE_SIZE); + __set_bit(PG_mapped, &page->flags); + } } #endif @@ -80,7 +85,7 @@ void __flush_tlb_page(unsigned long asid, unsigned long page) */ addr = MMU_TLB_ADDRESS_ARRAY | (page & 0x1F000); data = (page & 0xfffe0000) | asid; /* VALID bit is off */ - + if ((cpu_data->flags & CPU_HAS_MMU_PAGE_ASSOC)) { addr |= MMU_PAGE_ASSOC_BIT; ways = 1; /* we already know the way .. */