From: Topi Pohjolainen <topi.pohjolainen@intel.com>
Date: Sun, 14 May 2017 16:02:20 +0000 (+0300)
Subject: intel/isl/gen6: Allow arrayed stencil
X-Git-Tag: upstream/18.1.0~8701
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=0d1af164e197756e2d804e479e0f3e735a25f26c;p=platform%2Fupstream%2Fmesa.git

intel/isl/gen6: Allow arrayed stencil

Nothing prevents arrayed stencil surfaces even though hardware
doesn't support mipmapping.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
---

diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 351612a..2449ffb 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -447,7 +447,6 @@ isl_choose_array_pitch_span(const struct isl_device *dev,
           *    the storage for LODs other than LOD 0 is not needed.
           */
          assert(info->levels == 1);
-         assert(phys_level0_sa->array_len == 1);
          return ISL_ARRAY_PITCH_SPAN_COMPACT;
       } else {
          if ((ISL_DEV_GEN(dev) == 5 || ISL_DEV_GEN(dev) == 6) &&