From: Seungwhan Youn <sw.youn@samsung.com>
Date: Fri, 10 Sep 2010 08:20:00 +0000 (+0900)
Subject: ASoC: S3C: Fix PCM RX FIFO settings
X-Git-Tag: v2.6.37-rc1~82^2~8^2~107
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=0cca9012527b77df1491f1b8422c7aae16e17ae0;p=profile%2Fivi%2Fkernel-x86-ivi.git

ASoC: S3C: Fix PCM RX FIFO settings

When PCM capture, sound recorded abnormally because of RX FIFO
threshold settings are missing. So, This patch modify PCM RX FIFO
setting codes same as TX.
And for DMA, if PCM RXFIFO_DIPSTICK is not '0', it doesn't effect
to DMA request, because DMA refer RX_FIFO_EMPTY flag as the DMA
request.

Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
---

diff --git a/sound/soc/s3c24xx/s3c-pcm.c b/sound/soc/s3c24xx/s3c-pcm.c
index 825645f..eadd1be 100644
--- a/sound/soc/s3c24xx/s3c-pcm.c
+++ b/sound/soc/s3c24xx/s3c-pcm.c
@@ -102,11 +102,14 @@ static void s3c_pcm_snd_rxctrl(struct s3c_pcm_info *pcm, int on)
 
 	ctl = readl(regs + S3C_PCM_CTL);
 	clkctl = readl(regs + S3C_PCM_CLKCTL);
+	ctl &= ~(S3C_PCM_CTL_RXDIPSTICK_MASK
+			 << S3C_PCM_CTL_RXDIPSTICK_SHIFT);
 
 	if (on) {
 		ctl |= S3C_PCM_CTL_RXDMA_EN;
 		ctl |= S3C_PCM_CTL_RXFIFO_EN;
 		ctl |= S3C_PCM_CTL_ENABLE;
+		ctl |= (0x20<<S3C_PCM_CTL_RXDIPSTICK_SHIFT);
 		clkctl |= S3C_PCM_CLKCTL_SERCLK_EN;
 	} else {
 		ctl &= ~S3C_PCM_CTL_RXDMA_EN;
diff --git a/sound/soc/s3c24xx/s3c-pcm.h b/sound/soc/s3c24xx/s3c-pcm.h
index 69ff997..f60baa1 100644
--- a/sound/soc/s3c24xx/s3c-pcm.h
+++ b/sound/soc/s3c24xx/s3c-pcm.h
@@ -22,7 +22,8 @@
 /* PCM_CTL Bit-Fields */
 #define S3C_PCM_CTL_TXDIPSTICK_MASK		(0x3f)
 #define S3C_PCM_CTL_TXDIPSTICK_SHIFT	(13)
-#define S3C_PCM_CTL_RXDIPSTICK_MSK		(0x3f<<7)
+#define S3C_PCM_CTL_RXDIPSTICK_MASK		(0x3f)
+#define S3C_PCM_CTL_RXDIPSTICK_SHIFT	(7)
 #define S3C_PCM_CTL_TXDMA_EN		(0x1<<6)
 #define S3C_PCM_CTL_RXDMA_EN		(0x1<<5)
 #define S3C_PCM_CTL_TXMSB_AFTER_FSYNC	(0x1<<4)