From: Nicolai Haehnle Date: Sat, 24 Mar 2007 15:42:08 +0000 (+0100) Subject: r300: No assertion when accessing incomplete texture images. X-Git-Tag: 062012170305~19743 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=0c3ae2ea7fbb9c1087bdbc1048c380ca760b80d2;p=profile%2Fivi%2Fmesa.git r300: No assertion when accessing incomplete texture images. There used to be an assertion when a fragment program accesses an incomplete texture image. Work around this assertion. Note: I am unsure whether this workaround produces the desired result (0,0,0,1) on all hardware. --- diff --git a/src/mesa/drivers/dri/r300/r300_context.h b/src/mesa/drivers/dri/r300/r300_context.h index fe261db..fa0f554 100644 --- a/src/mesa/drivers/dri/r300/r300_context.h +++ b/src/mesa/drivers/dri/r300/r300_context.h @@ -602,12 +602,6 @@ extern int hw_tcl_on; /* Should but doesnt work */ //#define CURRENT_VERTEX_SHADER(ctx) (R300_CONTEXT(ctx)->curr_vp) -//#define TMU_ENABLED(ctx, unit) (hw_tcl_on ? ctx->Texture.Unit[unit]._ReallyEnabled && (OutputsWritten & (1<<(VERT_RESULT_TEX0+(unit)))) : -// (r300->state.render_inputs & (_TNL_BIT_TEX0<<(unit)))) -//#define TMU_ENABLED(ctx, unit) (hw_tcl_on ? ctx->Texture.Unit[unit]._ReallyEnabled && OutputsWritten & (1<<(VERT_RESULT_TEX0+(unit))) : -// ctx->Texture.Unit[unit]._ReallyEnabled && r300->state.render_inputs & (_TNL_BIT_TEX0<<(unit))) - -#define TMU_ENABLED(ctx, unit) (ctx->Texture.Unit[unit]._ReallyEnabled) /* r300_vertex_shader_state and r300_vertex_program should probably be merged together someday. * Keeping them them seperate for now should ensure fixed pipeline keeps functioning properly. diff --git a/src/mesa/drivers/dri/r300/r300_reg.h b/src/mesa/drivers/dri/r300/r300_reg.h index 1f4a2d2..1f65f9a 100644 --- a/src/mesa/drivers/dri/r300/r300_reg.h +++ b/src/mesa/drivers/dri/r300/r300_reg.h @@ -325,7 +325,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. * Most likely this is used to ignore rest of the program in cases * where group of verts arent visible. For some reason this "section" * is sometimes accepted other instruction that have no relationship with - *position calculations. + *position calculations. */ #define R300_VAP_PVS_CNTL_1 0x22D0 # define R300_PVS_CNTL_1_PROGRAM_START_SHIFT 0 @@ -566,8 +566,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #define R300_RE_FOG_SCALE 0x4294 #define R300_RE_FOG_START 0x4298 -/* Not sure why there are duplicate of factor and constant values. - * My best guess so far is that there are seperate zbiases for test and write. +/* Not sure why there are duplicate of factor and constant values. + * My best guess so far is that there are seperate zbiases for test and write. * Ordering might be wrong. * Some of the tests indicate that fgl has a fallback implementation of zbias * via pixel shaders. @@ -909,7 +909,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. /* 32 bit chroma key */ #define R300_TX_CHROMA_KEY_0 0x4580 /* ff00ff00 == { 0, 1.0, 0, 1.0 } */ -#define R300_TX_BORDER_COLOR_0 0x45C0 +#define R300_TX_BORDER_COLOR_0 0x45C0 /* END: Texture specification */ @@ -999,6 +999,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_FPITX_OP_KIL 2 # define R300_FPITX_OP_TXP 3 # define R300_FPITX_OP_TXB 4 +# define R300_FPITX_OPCODE_MASK (7 << 15) /* ALU * The ALU instructions register blocks are enumerated according to the order diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c index ef23a61..4fd80e6 100644 --- a/src/mesa/drivers/dri/r300/r300_state.c +++ b/src/mesa/drivers/dri/r300/r300_state.c @@ -1239,7 +1239,7 @@ void r300_setup_textures(GLcontext *ctx) /* We cannot let disabled tmu offsets pass DRM */ for(i=0; i < mtu; i++) { - if(TMU_ENABLED(ctx, i)) { + if (ctx->Texture.Unit[i]._ReallyEnabled) { #if 0 /* Enables old behaviour */ hw_tmu = i; @@ -1299,6 +1299,7 @@ void r300_setup_textures(GLcontext *ctx) for(i = 0; i < rp->tex.length; i++){ int unit; + int opcode; unsigned long val; unit = rp->tex.inst[i] >> R300_FPITX_IMAGE_SHIFT; @@ -1307,13 +1308,18 @@ void r300_setup_textures(GLcontext *ctx) val = rp->tex.inst[i]; val &= ~R300_FPITX_IMAGE_MASK; - if (((val >> R300_FPITX_OPCODE_SHIFT) & 7) == R300_FPITX_OP_KIL) { + opcode = (val & R300_FPITX_OPCODE_MASK) >> R300_FPITX_OPCODE_SHIFT; + if (opcode == R300_FPITX_OP_KIL) { r300->hw.fpt.cmd[R300_FPT_INSTR_0+i] = val; } else { - assert(tmu_mappings[unit] >= 0); - - val |= tmu_mappings[unit] << R300_FPITX_IMAGE_SHIFT; - r300->hw.fpt.cmd[R300_FPT_INSTR_0+i] = val; + if (tmu_mappings[unit] >= 0) { + val |= tmu_mappings[unit] << R300_FPITX_IMAGE_SHIFT; + r300->hw.fpt.cmd[R300_FPT_INSTR_0+i] = val; + } else { + // We get here when the corresponding texture image is incomplete + // (e.g. incomplete mipmaps etc.) + r300->hw.fpt.cmd[R300_FPT_INSTR_0+i] = val; + } } }