From: Jesse Natalie Date: Wed, 15 Mar 2023 14:46:06 +0000 (-0700) Subject: dzn: Don't use plane slice 1 for depth+stencil SRVs X-Git-Tag: upstream/23.3.3~11183 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=0bf1a436011e67bc820212356f6852809ec4a14b;p=platform%2Fupstream%2Fmesa.git dzn: Don't use plane slice 1 for depth+stencil SRVs Part-of: --- diff --git a/src/microsoft/vulkan/dzn_image.c b/src/microsoft/vulkan/dzn_image.c index b5c0514..169273a 100644 --- a/src/microsoft/vulkan/dzn_image.c +++ b/src/microsoft/vulkan/dzn_image.c @@ -991,7 +991,8 @@ translate_swizzle(VkComponentSwizzle in, uint32_t comp) static void dzn_image_view_prepare_srv_desc(struct dzn_image_view *iview) { - uint32_t plane_slice = (iview->vk.aspects & VK_IMAGE_ASPECT_STENCIL_BIT) ? 1 : 0; + uint32_t plane_slice = (iview->vk.aspects & (VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT)) == + VK_IMAGE_ASPECT_STENCIL_BIT ? 1 : 0; bool ms = iview->vk.image->samples > 1; uint32_t layers_per_elem = (iview->vk.view_type == VK_IMAGE_VIEW_TYPE_CUBE ||