From: Caio Marcelo de Oliveira Filho Date: Tue, 12 Nov 2019 18:42:09 +0000 (-0800) Subject: anv: Initialize depth_bounds_test_enable when not explicitly set X-Git-Tag: upstream/20.1.8~6041 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=0aaf47f7cd50b9c07c1297fe8daff1b2693a6729;p=platform%2Fupstream%2Fmesa.git anv: Initialize depth_bounds_test_enable when not explicitly set This was causing uninitialized value to end up propagated to the 3DSTATE_DEPTH_BOUNDS packet, leading to asserts on packet building due to the value being greater than 1. Fixes: 939ddccb7a5 ("anv: Add support for depth bounds testing.") Reviewed-by: Plamena Manolova --- diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c index 078b3f2..5594726 100644 --- a/src/intel/vulkan/genX_pipeline.c +++ b/src/intel/vulkan/genX_pipeline.c @@ -999,6 +999,7 @@ emit_ds_state(struct anv_pipeline *pipeline, pipeline->stencil_test_enable = false; pipeline->writes_depth = false; pipeline->depth_test_enable = false; + pipeline->depth_bounds_test_enable = false; memset(depth_stencil_dw, 0, sizeof(depth_stencil_dw)); return; } @@ -1017,8 +1018,6 @@ emit_ds_state(struct anv_pipeline *pipeline, pipeline->depth_test_enable = info.depthTestEnable; pipeline->depth_bounds_test_enable = info.depthBoundsTestEnable; - /* VkBool32 depthBoundsTestEnable; // optional (depth_bounds_test) */ - #if GEN_GEN <= 7 struct GENX(DEPTH_STENCIL_STATE) depth_stencil = { #else