From: Eduardo Habkost <ehabkost@redhat.com>
Date: Tue, 3 Nov 2015 19:17:33 +0000 (-0200)
Subject: target-i386: Remove SSE4a from qemu64 CPU model
X-Git-Tag: TizenStudio_2.0_p2.3.2~120^2~1^2~90^2~3
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=0909ad24b2769368716c85f79fbb995dbb7041a9;p=sdk%2Femulator%2Fqemu.git

target-i386: Remove SSE4a from qemu64 CPU model

SSE4a is not available in any Intel CPU, and we want to make the default
CPU runnable in most hosts, so it doesn't make sense to enable it by
default in KVM mode.

We should eventually have all features supported by TCG enabled by
default in TCG mode, but as we don't have a good mechanism today to
ensure we have different defaults in KVM and TCG mode, disable SSE4a in
the qemu64 CPU model entirely.

Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 8be4520..bc82c14 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -327,6 +327,11 @@ bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
             .driver   = TYPE_X86_CPU,\
             .property = "check",\
             .value    = "off",\
+        },\
+        {\
+            .driver   = "qemu64" "-" TYPE_X86_CPU,\
+            .property = "sse4a",\
+            .value    = "on",\
         },
 
 #define PC_COMPAT_2_3 \
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 9d0eedf..5aa3ce7 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -676,7 +676,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
             CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
         .features[FEAT_8000_0001_ECX] =
             CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM |
-            CPUID_EXT3_ABM | CPUID_EXT3_SSE4A,
+            CPUID_EXT3_ABM,
         .xlevel = 0x8000000A,
     },
     {