From: Steve MacLean, Qualcomm Datacenter Technologies, Inc <sdmaclea@qti.qualcomm.com>
Date: Thu, 27 Apr 2017 19:20:21 +0000 (+0000)
Subject: [Arm64] Use ldp for mismatched GC types in genPutArgStk
X-Git-Tag: submit/tizen/20210909.063632~11030^2~7075^2~2
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=08b659c34e01dce1fa24cf5b1274f751ff99716e;p=platform%2Fupstream%2Fdotnet%2Fruntime.git

[Arm64] Use ldp for mismatched GC types in genPutArgStk


Commit migrated from https://github.com/dotnet/coreclr/commit/2d7edf2eb07b04f8839b676c045efb62d986ec41
---

diff --git a/src/coreclr/src/jit/codegenarmarch.cpp b/src/coreclr/src/jit/codegenarmarch.cpp
index 4a79ad1..0888e83 100644
--- a/src/coreclr/src/jit/codegenarmarch.cpp
+++ b/src/coreclr/src/jit/codegenarmarch.cpp
@@ -356,20 +356,9 @@ void CodeGen::genPutArgStk(GenTreePutArgStk* treeNode)
                     assert(loReg != addrReg);
                     noway_assert((remainingSize == 2 * TARGET_POINTER_SIZE) || (hiReg != addrReg));
 
-                    // Use a ldp instruction if types match
-                    // TODO-ARM64-CQ: Current limitations only allows using ldp/stp when both of the GC types match
-                    if (type0 == type1)
-                    {
-                        // Load from our address expression source
-                        emit->emitIns_R_R_R_I(INS_ldp, emitTypeSize(type0), loReg, hiReg, addrReg, structOffset);
-                    }
-                    else
-                    {
-                        // Load from our address expression source
-                        emit->emitIns_R_R_I(ins_Load(type0), emitTypeSize(type0), loReg, addrReg, structOffset);
-                        emit->emitIns_R_R_I(ins_Load(type1), emitTypeSize(type1), hiReg, addrReg,
-                                            structOffset + TARGET_POINTER_SIZE);
-                    }
+                    // Load from our address expression source
+                    emit->emitIns_R_R_R_I(INS_ldp, emitTypeSize(type0), loReg, hiReg, addrReg, structOffset,
+                                          INS_OPTS_NONE, emitTypeSize(type0));
                 }
 
                 // Emit two store instructions to store the two registers into the outgoing argument area