From: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Date: Tue, 20 Jun 2006 14:26:30 +0000 (+0900)
Subject: [MIPS] Remove set_c0_status(ST0_IM) from wrppmc's irq.c.
X-Git-Tag: v2.6.18-rc1~353^2~22
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=08aecfb9eaf019f07384175101c970ede271c17a;p=platform%2Fkernel%2Flinux-stable.git

[MIPS] Remove set_c0_status(ST0_IM) from wrppmc's irq.c.

mips_cpu_irq_init() does clear_c0_status(ST0_IM) first, so
set_c0_status(ST0_IM) isn't necessary.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---

diff --git a/arch/mips/gt64120/wrppmc/irq.c b/arch/mips/gt64120/wrppmc/irq.c
index 26cf360..8d75a43 100644
--- a/arch/mips/gt64120/wrppmc/irq.c
+++ b/arch/mips/gt64120/wrppmc/irq.c
@@ -62,9 +62,6 @@ void gt64120_init_pic(void)
 
 void __init arch_init_irq(void)
 {
-	/* enable all CPU interrupt bits. */
-	set_c0_status(ST0_IM);	/* IE bit is still 0 */
-
 	/* IRQ 0 - 7 are for MIPS common irq_cpu controller */
 	mips_cpu_irq_init(0);