From: Palmer Dabbelt <palmer@sifive.com>
Date: Fri, 1 Dec 2017 21:12:10 +0000 (-0800)
Subject: RISC-V: User-Visible Changes
X-Git-Tag: v4.19~2053^2~3
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=07f8ba7439f9c942d5bd7b63074e7a1528601713;p=platform%2Fkernel%2Flinux-rpi.git

RISC-V: User-Visible Changes

This merge contains the user-visible, ABI-breaking changes that we want
to make sure we have in Linux before our first release.   Highlights
include:

* VDSO entries for clock_get/gettimeofday/getcpu have been added.  These
  are simple syscalls now, but we want to let glibc use them from the
  start so we can make them faster later.
* A VDSO entry for instruction cache flushing has been added so
  userspace can flush the instruction cache.
* The VDSO symbol versions for __vdso_cmpxchg{32,64} have been removed,
  as those VDSO entries don't actually exist.

Conflicts:
        arch/riscv/include/asm/tlbflush.h
---

07f8ba7439f9c942d5bd7b63074e7a1528601713
diff --cc arch/riscv/include/asm/tlbflush.h
index c79fab3,77edf28..715b0f1
--- a/arch/riscv/include/asm/tlbflush.h
+++ b/arch/riscv/include/asm/tlbflush.h
@@@ -17,10 -17,9 +17,12 @@@
  
  #ifdef CONFIG_MMU
  
+ #include <linux/mm_types.h>
+ 
 -/* Flush entire local TLB */
 +/*
 + * Flush entire local TLB.  'sfence.vma' implicitly fences with the instruction
 + * cache as well, so a 'fence.i' is not necessary.
 + */
  static inline void local_flush_tlb_all(void)
  {
  	__asm__ __volatile__ ("sfence.vma" : : : "memory");