From: thopre01 <thopre01@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Wed, 20 Jan 2016 01:56:39 +0000 (+0000)
Subject: 2016-01-20  Andre Vieira  <andre.simoesdiasvieira@arm.com>
X-Git-Tag: upstream/6.1~1611
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=0754bad12eeeb90fc3a004d8ab78aec008d10913;p=platform%2Fupstream%2Flinaro-gcc.git

2016-01-20  Andre Vieira  <andre.simoesdiasvieira@arm.com>

    gcc/testsuite/
    * gcc.target/arm/memset-inline-10.c: Added
    dg-require-effective-target arm_thumb2_ok.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@232600 138bc75d-0d04-0410-961f-82ee72b054a4
---

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 065c7a8..63baf4e 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2016-01-20  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+
+	* gcc.target/arm/memset-inline-10.c: Added
+	dg-require-effective-target arm_thumb2_ok.
+
 2016-01-19  Eric Botcazou  <ebotcazou@adacore.com>
 
 	* gcc.dg/debug/dwarf2/sso.c: New test.
diff --git a/gcc/testsuite/gcc.target/arm/memset-inline-10.c b/gcc/testsuite/gcc.target/arm/memset-inline-10.c
index c1087c8..ce51c1d 100644
--- a/gcc/testsuite/gcc.target/arm/memset-inline-10.c
+++ b/gcc/testsuite/gcc.target/arm/memset-inline-10.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_thumb2_ok } */
 /* { dg-options "-march=armv7-a -mfloat-abi=hard -mfpu=neon -O2" } */
 /* { dg-skip-if "need SIMD instructions" { *-*-* } { "-mfloat-abi=soft" } { "" } } */
 /* { dg-skip-if "need SIMD instructions" { *-*-* } { "-mfpu=vfp*" } { "" } } */