From: Caio Marcelo de Oliveira Filho Date: Fri, 19 Apr 2019 04:04:57 +0000 (-0700) Subject: intel/fs: Don't handle texop_tex for shaders without implicit LOD X-Git-Tag: upstream/19.3.0~6952 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=055f6281d410aa55ac56169973897000d0e0cd42;p=platform%2Fupstream%2Fmesa.git intel/fs: Don't handle texop_tex for shaders without implicit LOD These will be lowered by nir_lower_tex() with the lower_tex_when_implicit_lod_not_supported, so don't need the extra handling here. Reviewed-by: Rob Clark Reviewed-by: Lionel Landwerlin --- diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 59d9926..71fe0ff 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -5353,15 +5353,10 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr) srcs[TEX_LOGICAL_SRC_COORD_COMPONENTS] = brw_imm_d(instr->coord_components); srcs[TEX_LOGICAL_SRC_GRAD_COMPONENTS] = brw_imm_d(lod_components); - bool shader_supports_implicit_lod = stage == MESA_SHADER_FRAGMENT || - (stage == MESA_SHADER_COMPUTE && - nir->info.cs.derivative_group != DERIVATIVE_GROUP_NONE); - enum opcode opcode; switch (instr->op) { case nir_texop_tex: - opcode = shader_supports_implicit_lod ? - SHADER_OPCODE_TEX_LOGICAL : SHADER_OPCODE_TXL_LOGICAL; + opcode = SHADER_OPCODE_TEX_LOGICAL; break; case nir_texop_txb: opcode = FS_OPCODE_TXB_LOGICAL; diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c index e0a393f..4a1fbf0 100644 --- a/src/intel/compiler/brw_nir.c +++ b/src/intel/compiler/brw_nir.c @@ -693,6 +693,7 @@ brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir, .lower_txp = ~0, .lower_txf_offset = true, .lower_rect_offset = true, + .lower_tex_without_implicit_lod = true, .lower_txd_cube_map = true, .lower_txb_shadow_clamp = true, .lower_txd_shadow_clamp = true,