From: Tom St Denis Date: Tue, 9 Jun 2020 11:49:59 +0000 (-0400) Subject: drm/amd/amdgpu: Add SQ debug registers to GFX9/GFX10 headers (v2) X-Git-Tag: v5.10.7~1861^2~25^2~143 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=055e23e3d9ea1d680977f8e34f9678c17cb3cfc1;p=platform%2Fkernel%2Flinux-rpi.git drm/amd/amdgpu: Add SQ debug registers to GFX9/GFX10 headers (v2) Requested for UMR support. (v2): Also add reg/bits for gfx9 headers Signed-off-by: Tom St Denis Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h index 075867d..791dc2b 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h +++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h @@ -11151,6 +11151,7 @@ // addressBlock: sqind // base address: 0x0 +#define ixSQ_DEBUG_STS_LOCAL 0x0008 #define ixSQ_WAVE_MODE 0x0101 #define ixSQ_WAVE_STATUS 0x0102 #define ixSQ_WAVE_TRAPSTS 0x0103 diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h index 8b0b9a2..355e61b 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h +++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h @@ -42546,6 +42546,26 @@ // addressBlock: sqind +//SQ_DEBUG_STS_LOCAL +#define SQ_DEBUG_STS_LOCAL__BUSY_MASK 0x00000001L +#define SQ_DEBUG_STS_LOCAL__BUSY__SHIFT 0x00000000 +#define SQ_DEBUG_STS_LOCAL__WAVE_LEVEL_MASK 0x000003f0L +#define SQ_DEBUG_STS_LOCAL__WAVE_LEVEL__SHIFT 0x00000004 +#define SQ_DEBUG_STS_LOCAL__SQ_BUSY_MASK 0x00001000L +#define SQ_DEBUG_STS_LOCAL__SQ_BUSY__SHIFT 0x0000000C +#define SQ_DEBUG_STS_LOCAL__IS_BUSY_MASK 0x00002000L +#define SQ_DEBUG_STS_LOCAL__IS_BUSY__SHIFT 0x0000000D +#define SQ_DEBUG_STS_LOCAL__IB_BUSY_MASK 0x00004000L +#define SQ_DEBUG_STS_LOCAL__IB_BUSY__SHIFT 0x0000000E +#define SQ_DEBUG_STS_LOCAL__ARB_BUSY_MASK 0x00008000L +#define SQ_DEBUG_STS_LOCAL__ARB_BUSY__SHIFT 0x0000000F +#define SQ_DEBUG_STS_LOCAL__EXP_BUSY_MASK 0x00010000L +#define SQ_DEBUG_STS_LOCAL__EXP_BUSY__SHIFT 0x00000010 +#define SQ_DEBUG_STS_LOCAL__BRMSG_BUSY_MASK 0x00020000L +#define SQ_DEBUG_STS_LOCAL__BRMSG_BUSY__SHIFT 0x00000011 +#define SQ_DEBUG_STS_LOCAL__VM_BUSY_MASK 0x00040000L +#define SQ_DEBUG_STS_LOCAL__VM_BUSY__SHIFT 0x00000018 + //SQ_WAVE_MODE #define SQ_WAVE_MODE__FP_ROUND__SHIFT 0x0 #define SQ_WAVE_MODE__FP_DENORM__SHIFT 0x4 diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h index 71c787d..a9a6637 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h +++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h @@ -13277,6 +13277,7 @@ // addressBlock: sqind // base address: 0x0 +#define ixSQ_DEBUG_STS_LOCAL 0x0008 #define ixSQ_WAVE_ACTIVE 0x000a #define ixSQ_WAVE_VALID_AND_IDLE 0x000b #define ixSQ_WAVE_MODE 0x0101 diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h index 00bae8e..499a8c3 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h +++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h @@ -46269,6 +46269,25 @@ // addressBlock: sqind +//SQ_DEBUG_STS_LOCAL +#define SQ_DEBUG_STS_LOCAL__BUSY_MASK 0x00000001L +#define SQ_DEBUG_STS_LOCAL__BUSY__SHIFT 0x00000000 +#define SQ_DEBUG_STS_LOCAL__WAVE_LEVEL_MASK 0x000003f0L +#define SQ_DEBUG_STS_LOCAL__WAVE_LEVEL__SHIFT 0x00000004 +#define SQ_DEBUG_STS_LOCAL__SQ_BUSY_MASK 0x00001000L +#define SQ_DEBUG_STS_LOCAL__SQ_BUSY__SHIFT 0x0000000C +#define SQ_DEBUG_STS_LOCAL__IS_BUSY_MASK 0x00002000L +#define SQ_DEBUG_STS_LOCAL__IS_BUSY__SHIFT 0x0000000D +#define SQ_DEBUG_STS_LOCAL__IB_BUSY_MASK 0x00004000L +#define SQ_DEBUG_STS_LOCAL__IB_BUSY__SHIFT 0x0000000E +#define SQ_DEBUG_STS_LOCAL__ARB_BUSY_MASK 0x00008000L +#define SQ_DEBUG_STS_LOCAL__ARB_BUSY__SHIFT 0x0000000F +#define SQ_DEBUG_STS_LOCAL__EXP_BUSY_MASK 0x00010000L +#define SQ_DEBUG_STS_LOCAL__EXP_BUSY__SHIFT 0x00000010 +#define SQ_DEBUG_STS_LOCAL__BRMSG_BUSY_MASK 0x00020000L +#define SQ_DEBUG_STS_LOCAL__BRMSG_BUSY__SHIFT 0x00000011 +#define SQ_DEBUG_STS_LOCAL__VM_BUSY_MASK 0x00040000L +#define SQ_DEBUG_STS_LOCAL__VM_BUSY__SHIFT 0x00000018 //SQ_WAVE_ACTIVE #define SQ_WAVE_ACTIVE__WAVE_SLOT__SHIFT 0x0 #define SQ_WAVE_ACTIVE__WAVE_SLOT_MASK 0x000FFFFFL diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h index d984c91..fc39795 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h +++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h @@ -7088,6 +7088,7 @@ // addressBlock: sqind // base address: 0x0 +#define ixSQ_DEBUG_STS_LOCAL 0x0008 #define ixSQ_WAVE_MODE 0x0011 #define ixSQ_WAVE_STATUS 0x0012 #define ixSQ_WAVE_TRAPSTS 0x0013 diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h index ea316d8..d7964c2 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h +++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h @@ -28350,6 +28350,11 @@ // addressBlock: sqind +//SQ_DEBUG_STS_LOCAL +#define SQ_DEBUG_STS_LOCAL__BUSY_MASK 0x00000001L +#define SQ_DEBUG_STS_LOCAL__BUSY__SHIFT 0x00000000 +#define SQ_DEBUG_STS_LOCAL__WAVE_LEVEL_MASK 0x000003f0L +#define SQ_DEBUG_STS_LOCAL__WAVE_LEVEL__SHIFT 0x00000004 //SQ_WAVE_MODE #define SQ_WAVE_MODE__FP_ROUND__SHIFT 0x0 #define SQ_WAVE_MODE__FP_DENORM__SHIFT 0x4 diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h index 030e002..2223d4b 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h +++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h @@ -7296,6 +7296,7 @@ // addressBlock: sqind // base address: 0x0 +#define ixSQ_DEBUG_STS_LOCAL 0x0008 #define ixSQ_WAVE_MODE 0x0011 #define ixSQ_WAVE_STATUS 0x0012 #define ixSQ_WAVE_TRAPSTS 0x0013 diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h index 13bfc2e..4acf640 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h +++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h @@ -29571,6 +29571,11 @@ // addressBlock: sqind +//SQ_DEBUG_STS_LOCAL +#define SQ_DEBUG_STS_LOCAL__BUSY_MASK 0x00000001L +#define SQ_DEBUG_STS_LOCAL__BUSY__SHIFT 0x00000000 +#define SQ_DEBUG_STS_LOCAL__WAVE_LEVEL_MASK 0x000003f0L +#define SQ_DEBUG_STS_LOCAL__WAVE_LEVEL__SHIFT 0x00000004 //SQ_WAVE_MODE #define SQ_WAVE_MODE__FP_ROUND__SHIFT 0x0 #define SQ_WAVE_MODE__FP_DENORM__SHIFT 0x4 diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h index 5ab240c..1c5ef8e 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h +++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h @@ -7335,6 +7335,7 @@ // addressBlock: sqind // base address: 0x0 +#define ixSQ_DEBUG_STS_LOCAL 0x0008 #define ixSQ_WAVE_MODE 0x0011 #define ixSQ_WAVE_STATUS 0x0012 #define ixSQ_WAVE_TRAPSTS 0x0013 diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h index 76ea902..088f59c 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h +++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h @@ -29893,6 +29893,11 @@ // addressBlock: sqind +//SQ_DEBUG_STS_LOCAL +#define SQ_DEBUG_STS_LOCAL__BUSY_MASK 0x00000001L +#define SQ_DEBUG_STS_LOCAL__BUSY__SHIFT 0x00000000 +#define SQ_DEBUG_STS_LOCAL__WAVE_LEVEL_MASK 0x000003f0L +#define SQ_DEBUG_STS_LOCAL__WAVE_LEVEL__SHIFT 0x00000004 //SQ_WAVE_MODE #define SQ_WAVE_MODE__FP_ROUND__SHIFT 0x0 #define SQ_WAVE_MODE__FP_DENORM__SHIFT 0x4