From: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Date: Wed, 14 Nov 2018 11:50:18 +0000 (+0530)
Subject: arm64: zynqmp: Change the spi-rx-bus-width property to x1
X-Git-Tag: v2019.04-rc2~10^2~1
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=053d4bd4727185f292a0bb2ac080c8c6ae794cbe;p=platform%2Fkernel%2Fu-boot.git

arm64: zynqmp: Change the spi-rx-bus-width property to x1

As per the zc1275 design x1 mode is enabled so changing the
spi-rx-bus-width property to x1.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

diff --git a/arch/arm/dts/zynqmp-zc1275-revB.dts b/arch/arm/dts/zynqmp-zc1275-revB.dts
index e84b2da..1a7975b 100644
--- a/arch/arm/dts/zynqmp-zc1275-revB.dts
+++ b/arch/arm/dts/zynqmp-zc1275-revB.dts
@@ -47,7 +47,7 @@
 		#size-cells = <1>;
 		reg = <0x0>;
 		spi-tx-bus-width = <1>;
-		spi-rx-bus-width = <4>;
+		spi-rx-bus-width = <1>;
 		spi-max-frequency = <108000000>; /* Based on DC1 spec */
 		partition@qspi-fsbl-uboot { /* for testing purpose */
 			label = "qspi-fsbl-uboot";