From: Hanjoung Lee <hanjoung.lee@samsung.com>
Date: Wed, 23 Aug 2017 08:47:03 +0000 (+0900)
Subject: [RyuJIT/arm32] Fix MultiReg flag setter
X-Git-Tag: submit/tizen/20210909.063632~11030^2~6513^2~247^2
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=0507e69783e4e3fc9c682d1ae61a8440a457e07a;p=platform%2Fupstream%2Fdotnet%2Fruntime.git

[RyuJIT/arm32] Fix MultiReg flag setter

Bitwise operation fix in `SetRegSpillFlagByIdx()`.

Fix dotnet/coreclr#13423


Commit migrated from https://github.com/dotnet/coreclr/commit/7447d75d3027c4d01171ea46753d371fe7835a61
---

diff --git a/src/coreclr/src/jit/gentree.h b/src/coreclr/src/jit/gentree.h
index afb835e..0e35c00 100644
--- a/src/coreclr/src/jit/gentree.h
+++ b/src/coreclr/src/jit/gentree.h
@@ -3513,8 +3513,10 @@ struct GenTreeCall final : public GenTree
             bits |= PACKED_GTF_SPILLED;
         }
 
+        const unsigned char packedFlags = PACKED_GTF_SPILL | PACKED_GTF_SPILLED;
+
         // Clear anything that was already there by masking out the bits before 'or'ing in what we want there.
-        gtSpillFlags = (unsigned char)((gtSpillFlags & ~(0xffU << (idx * 2))) | (bits << (idx * 2)));
+        gtSpillFlags = (unsigned char)((gtSpillFlags & ~(packedFlags << (idx * 2))) | (bits << (idx * 2)));
 #else
         unreached();
 #endif
@@ -4004,8 +4006,10 @@ struct GenTreeMultiRegOp : public GenTreeOp
             bits |= PACKED_GTF_SPILLED;
         }
 
+        const unsigned char packedFlags = PACKED_GTF_SPILL | PACKED_GTF_SPILLED;
+
         // Clear anything that was already there by masking out the bits before 'or'ing in what we want there.
-        gtSpillFlags = (unsigned char)((gtSpillFlags & ~(0xffU << (idx * 2))) | (bits << (idx * 2)));
+        gtSpillFlags = (unsigned char)((gtSpillFlags & ~(packedFlags << (idx * 2))) | (bits << (idx * 2)));
     }
 
     //--------------------------------------------------------------------------
@@ -5307,8 +5311,10 @@ struct GenTreePutArgSplit : public GenTreePutArgStk
             bits |= PACKED_GTF_SPILLED;
         }
 
+        const unsigned char packedFlags = PACKED_GTF_SPILL | PACKED_GTF_SPILLED;
+
         // Clear anything that was already there by masking out the bits before 'or'ing in what we want there.
-        gtSpillFlags = (unsigned char)((gtSpillFlags & ~(0xffU << (idx * 2))) | (bits << (idx * 2)));
+        gtSpillFlags = (unsigned char)((gtSpillFlags & ~(packedFlags << (idx * 2))) | (bits << (idx * 2)));
     }
 
     //--------------------------------------------------------------------------
diff --git a/src/coreclr/src/jit/regset.cpp b/src/coreclr/src/jit/regset.cpp
index 7fc7767..44312da 100644
--- a/src/coreclr/src/jit/regset.cpp
+++ b/src/coreclr/src/jit/regset.cpp
@@ -1639,7 +1639,8 @@ void RegSet::rsSpillTree(regNumber reg, GenTreePtr tree, unsigned regIdx /* =0 *
     }
 #elif defined(_TARGET_ARM_)
     assert(tree->gtRegNum == reg || (call != nullptr && call->GetRegNumByIdx(regIdx) == reg) ||
-           (splitArg != nullptr && splitArg->GetRegNumByIdx(regIdx) == reg));
+           (splitArg != nullptr && splitArg->GetRegNumByIdx(regIdx) == reg) ||
+           (multiReg != nullptr && multiReg->GetRegNumByIdx(regIdx) == reg));
 #else
     assert(tree->gtRegNum == reg || (call != nullptr && call->GetRegNumByIdx(regIdx) == reg));
 #endif // !CPU_LONG_USES_REGPAIR && !_TARGET_ARM_