From: Ville Syrjälä Date: Tue, 10 Dec 2013 18:47:44 +0000 (+0200) Subject: drm/i915: Use 32bit read for BB_ADDR X-Git-Tag: v3.14-rc1~47^2~44^2~27 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=0476190e107f398cfe0b50101bee4f8bd8e0fe30;p=profile%2Fivi%2Fkernel-x86-ivi.git drm/i915: Use 32bit read for BB_ADDR The BB_ADDR register is documented to be 32bits at least since SNB. Prior to that the high 32bits were listed as MBZ, so using a 64bit read doesn't seem worth anything. Also the simulator doesn't like the 64bit read. So just switch to using a 32bit read instead. Signed-off-by: Ville Syrjälä Reviewed-by: Ben Widawsky Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 79dcb8f..9a64292 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -726,7 +726,7 @@ static void i915_record_ring_state(struct drm_device *dev, error->instdone[ring->id] = I915_READ(RING_INSTDONE(ring->mmio_base)); error->instps[ring->id] = I915_READ(RING_INSTPS(ring->mmio_base)); if (ring->id == RCS) - error->bbaddr = I915_READ64(BB_ADDR); + error->bbaddr = I915_READ(BB_ADDR); error->bbstate[ring->id] = I915_READ(RING_BBSTATE(ring->mmio_base)); } else { error->faddr[ring->id] = I915_READ(DMA_FADD_I8XX);