From: Alexander Stein Date: Thu, 2 Jul 2015 09:37:56 +0000 (+0200) Subject: mtd: fsl-quadspi: Actually clear TX FIFO upon write X-Git-Tag: v4.14-rc1~4036^2~382 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=038761dfe4ce145f0f080cc08ee43f6e0ab3ae2f;p=platform%2Fkernel%2Flinux-rpi.git mtd: fsl-quadspi: Actually clear TX FIFO upon write QUADSPI_MCR_CLR_TXF_MASK is the correct mask for clearing the TX FIFO. Signed-off-by: Alexander Stein Signed-off-by: Brian Norris --- diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c index 4fe13dd..1946c6d 100644 --- a/drivers/mtd/spi-nor/fsl-quadspi.c +++ b/drivers/mtd/spi-nor/fsl-quadspi.c @@ -539,7 +539,7 @@ static int fsl_qspi_nor_write(struct fsl_qspi *q, struct spi_nor *nor, /* clear the TX FIFO. */ tmp = readl(q->iobase + QUADSPI_MCR); - writel(tmp | QUADSPI_MCR_CLR_RXF_MASK, q->iobase + QUADSPI_MCR); + writel(tmp | QUADSPI_MCR_CLR_TXF_MASK, q->iobase + QUADSPI_MCR); /* fill the TX data to the FIFO */ for (j = 0, i = ((count + 3) / 4); j < i; j++) {