From: Diana Picus <diana.picus@linaro.org>
Date: Fri, 14 Dec 2018 13:45:38 +0000 (+0000)
Subject: [ARM GlobalISel] Thumb2: casts between int and ptr
X-Git-Tag: llvmorg-8.0.0-rc1~2114
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=02c8343c754a21f6a8b34399df1d4f5a81084927;p=platform%2Fupstream%2Fllvm.git

[ARM GlobalISel] Thumb2: casts between int and ptr

Mark as legal and add tests. Nothing special to do.

llvm-svn: 349147
---

diff --git a/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp b/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
index 06d838b..ec613dd 100644
--- a/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
@@ -89,6 +89,9 @@ ARMLegalizerInfo::ARMLegalizerInfo(const ARMSubtarget &ST) {
       .legalFor({s32})
       .minScalar(0, s32);
 
+  getActionDefinitionsBuilder(G_INTTOPTR).legalFor({{p0, s32}});
+  getActionDefinitionsBuilder(G_PTRTOINT).legalFor({{s32, p0}});
+
   // We're keeping these builders around because we'll want to add support for
   // floating point to them.
   auto &LoadStoreBuilder =
@@ -129,9 +132,6 @@ ARMLegalizerInfo::ARMLegalizerInfo(const ARMSubtarget &ST) {
       setAction({Op, s32}, Libcall);
   }
 
-  getActionDefinitionsBuilder(G_INTTOPTR).legalFor({{p0, s32}});
-  getActionDefinitionsBuilder(G_PTRTOINT).legalFor({{s32, p0}});
-
   getActionDefinitionsBuilder({G_ASHR, G_LSHR, G_SHL}).legalFor({s32});
 
   if (ST.hasV5TOps()) {
diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-casts.mir b/llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-casts.mir
new file mode 100644
index 0000000..c45bc3d
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-casts.mir
@@ -0,0 +1,50 @@
+# RUN: llc -mtriple arm-- -run-pass=legalizer %s -o - | FileCheck %s
+# RUN: llc -mtriple thumb-- -mattr=+v6t2 -run-pass=legalizer %s -o - | FileCheck %s
+--- |
+  define void @test_inttoptr_s32() { ret void }
+  define void @test_ptrtoint_s32() { ret void }
+...
+---
+name:            test_inttoptr_s32
+# CHECK-LABEL: name: test_inttoptr_s32
+legalized:       false
+# CHECK: legalized: true
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+body:             |
+  bb.0:
+    liveins: $r0
+
+    %0(s32) = COPY $r0
+    %1(p0) = G_INTTOPTR %0(s32)
+    ; G_INTTOPTR with s32 is legal, so we should find it unchanged in the output
+    ; CHECK: {{%[0-9]+}}:_(p0) = G_INTTOPTR {{%[0-9]+}}
+    $r0 = COPY %1(p0)
+    BX_RET 14, $noreg, implicit $r0
+...
+---
+name:            test_ptrtoint_s32
+# CHECK-LABEL: name: test_ptrtoint_s32
+legalized:       false
+# CHECK: legalized: true
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+body:             |
+  bb.0:
+    liveins: $r0
+
+    %0(p0) = COPY $r0
+    %1(s32) = G_PTRTOINT %0(p0)
+    ; G_PTRTOINT with s32 is legal, so we should find it unchanged in the output
+    ; CHECK: {{%[0-9]+}}:_(s32) = G_PTRTOINT {{%[0-9]+}}
+    $r0 = COPY %1(s32)
+    BX_RET 14, $noreg, implicit $r0
+...
diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir b/llvm/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir
index c409eaf..0d65fca 100644
--- a/llvm/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir
+++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir
@@ -1,8 +1,5 @@
 # RUN: llc -mtriple arm-- -run-pass=legalizer %s -o - | FileCheck %s
 --- |
-  define void @test_inttoptr_s32() { ret void }
-  define void @test_ptrtoint_s32() { ret void }
-
   define void @test_lshr_s32() { ret void }
   define void @test_ashr_s32() { ret void }
   define void @test_shl_s32() { ret void }
@@ -34,50 +31,6 @@
   attributes #0 = { "target-features"="+vfp2" }
 ...
 ---
-name:            test_inttoptr_s32
-# CHECK-LABEL: name: test_inttoptr_s32
-legalized:       false
-# CHECK: legalized: true
-regBankSelected: false
-selected:        false
-tracksRegLiveness: true
-registers:
-  - { id: 0, class: _ }
-  - { id: 1, class: _ }
-body:             |
-  bb.0:
-    liveins: $r0
-
-    %0(s32) = COPY $r0
-    %1(p0) = G_INTTOPTR %0(s32)
-    ; G_INTTOPTR with s32 is legal, so we should find it unchanged in the output
-    ; CHECK: {{%[0-9]+}}:_(p0) = G_INTTOPTR {{%[0-9]+}}
-    $r0 = COPY %1(p0)
-    BX_RET 14, $noreg, implicit $r0
-...
----
-name:            test_ptrtoint_s32
-# CHECK-LABEL: name: test_ptrtoint_s32
-legalized:       false
-# CHECK: legalized: true
-regBankSelected: false
-selected:        false
-tracksRegLiveness: true
-registers:
-  - { id: 0, class: _ }
-  - { id: 1, class: _ }
-body:             |
-  bb.0:
-    liveins: $r0
-
-    %0(p0) = COPY $r0
-    %1(s32) = G_PTRTOINT %0(p0)
-    ; G_PTRTOINT with s32 is legal, so we should find it unchanged in the output
-    ; CHECK: {{%[0-9]+}}:_(s32) = G_PTRTOINT {{%[0-9]+}}
-    $r0 = COPY %1(s32)
-    BX_RET 14, $noreg, implicit $r0
-...
----
 name:            test_lshr_s32
 # CHECK-LABEL: name: test_lshr_s32
 legalized:       false
diff --git a/llvm/test/CodeGen/ARM/GlobalISel/thumb-select-casts.mir b/llvm/test/CodeGen/ARM/GlobalISel/thumb-select-casts.mir
new file mode 100644
index 0000000..df5417e7
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/GlobalISel/thumb-select-casts.mir
@@ -0,0 +1,51 @@
+# RUN: llc -O0 -mtriple thumb-- -mattr=+v6t2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
+--- |
+  define void @test_inttoptr_s32() { ret void }
+  define void @test_ptrtoint_s32() { ret void }
+...
+---
+name:            test_inttoptr_s32
+# CHECK-LABEL: name: test_inttoptr_s32
+legalized:       true
+regBankSelected: true
+selected:        false
+# CHECK: selected: true
+registers:
+  - { id: 0, class: gprb }
+  - { id: 1, class: gprb }
+body:             |
+  bb.0:
+    liveins: $r0
+
+    %0(s32) = COPY $r0
+    %1(p0) = G_INTTOPTR %0(s32)
+    ; CHECK: [[INT:%[0-9]+]]:gpr = COPY $r0
+
+    $r0 = COPY %1(p0)
+    ; CHECK: $r0 = COPY [[INT]]
+
+    BX_RET 14, $noreg, implicit $r0
+...
+---
+name:            test_ptrtoint_s32
+# CHECK-LABEL: name: test_ptrtoint_s32
+legalized:       true
+regBankSelected: true
+selected:        false
+# CHECK: selected: true
+registers:
+  - { id: 0, class: gprb }
+  - { id: 1, class: gprb }
+body:             |
+  bb.0:
+    liveins: $r0
+
+    %0(p0) = COPY $r0
+    %1(s32) = G_PTRTOINT %0(p0)
+    ; CHECK: [[PTR:%[0-9]+]]:gpr = COPY $r0
+
+    $r0 = COPY %1(s32)
+    ; CHECK: $r0 = COPY [[PTR]]
+
+    BX_RET 14, $noreg, implicit $r0
+...