From: Marek Szyprowski Date: Fri, 1 Jul 2016 10:49:37 +0000 (+0200) Subject: ARM64: dts: exynos5433: fix clock for MSCL/JPEG devfreq control X-Git-Tag: submit/tizen/20160810.050017~30 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=019639be963b2297257d97aa3d4876251b71b5cd;p=platform%2Fkernel%2Flinux-exynos.git ARM64: dts: exynos5433: fix clock for MSCL/JPEG devfreq control Signed-off-by: Marek Szyprowski Change-Id: Ic1669e9657da1c601774b3bf366cc6036a77147c --- diff --git a/arch/arm64/boot/dts/exynos/exynos5433-memory-bus.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-memory-bus.dtsi index c202227c0ef4..db4297f33c6f 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433-memory-bus.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433-memory-bus.dtsi @@ -255,7 +255,7 @@ }; jpeg_block: memory_bus_block7 { - clocks = <&cmu_mscl CLK_SCLK_JPEG>; + clocks = <&cmu_top CLK_SCLK_JPEG_MSCL>; clock-names = "memory-bus"; frequency = < 400000