From: Jiong Wang <jiong.wang@arm.com>
Date: Tue, 13 Jan 2015 11:21:43 +0000 (+0000)
Subject: [AArch64] Enable overflow check for TLSLE_MOVW_TPREL_G2
X-Git-Tag: gdb-7.10-release~1931
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=0172429c3b2656e96ac390a9cdfc441f63df41c9;p=external%2Fbinutils.git

[AArch64] Enable overflow check for TLSLE_MOVW_TPREL_G2

  bfd/
    * elfnn-aarch64.c: (elfNN_aarch64_howto_table): Enable overflow check for
    TLSLE_MOVW_TPREL_G2.

  ld/testsuite/
    * ld-aarch64/tprel_g2_overflow.s: New testcase.
    * ld-aarch64/tprel_g2_overflow.d: New expectation file.
    * ld-aarch64/aarch64-elf.exp: Run new testcase.
---

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index e7630ab..b43a491 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,5 +1,10 @@
 2015-01-13  Jiong Wang  <jiong.wang@arm.com>
 
+	* elfnn-aarch64.c: (elfNN_aarch64_howto_table): Enable overflow check
+	for TLSLE_MOVW_TPREL_G2.
+
+2015-01-13  Jiong Wang  <jiong.wang@arm.com>
+
 	PR ld/17415
 	* elfnn-aarch64.c (elfNN_aarch64_howto_table): Mark
 	R_AARCH64_TLSLE_ADD_TPREL_HI12 as complain_overflow_unsigned.
diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c
index f632eee..c8401c1 100644
--- a/bfd/elfnn-aarch64.c
+++ b/bfd/elfnn-aarch64.c
@@ -968,7 +968,7 @@ static reloc_howto_type elfNN_aarch64_howto_table[] =
 	 12,			/* bitsize */
 	 FALSE,			/* pc_relative */
 	 0,			/* bitpos */
-	 complain_overflow_dont,	/* complain_on_overflow */
+	 complain_overflow_unsigned,	/* complain_on_overflow */
 	 bfd_elf_generic_reloc,	/* special_function */
 	 AARCH64_R_STR (TLSLE_MOVW_TPREL_G2),	/* name */
 	 FALSE,			/* partial_inplace */
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index 14cd6f6..27f8bc3 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,5 +1,11 @@
 2015-01-13  Jiong Wang  <jiong.wang@arm.com>
 
+	* ld-aarch64/tprel_g2_overflow.s: New testcase.
+	* ld-aarch64/tprel_g2_overflow.d: New expectation file.
+	* ld-aarch64/aarch64-elf.exp: Run new testcase.
+
+2015-01-13  Jiong Wang  <jiong.wang@arm.com>
+
 	PR ld/17415
 	* ld-aarch64/pr17415.s: Source file for new test.
 	* ld-aarch64/pr17415.d: Expect file for new test.
diff --git a/ld/testsuite/ld-aarch64/aarch64-elf.exp b/ld/testsuite/ld-aarch64/aarch64-elf.exp
index 9b715bb..7d421a5 100644
--- a/ld/testsuite/ld-aarch64/aarch64-elf.exp
+++ b/ld/testsuite/ld-aarch64/aarch64-elf.exp
@@ -131,6 +131,7 @@ run_dump_test "gc-plt-relocs"
 run_dump_test "gc-relocs-257-dyn"
 run_dump_test "gc-relocs-257"
 run_dump_test "pr17415"
+run_dump_test "tprel_g2_overflow"
 
 # ifunc tests
 run_dump_test "ifunc-1"
diff --git a/ld/testsuite/ld-aarch64/tprel_g2_overflow.d b/ld/testsuite/ld-aarch64/tprel_g2_overflow.d
new file mode 100644
index 0000000..8dcbe87
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tprel_g2_overflow.d
@@ -0,0 +1,6 @@
+#name: TLS offset out of range - TPREL_G2
+#source: tprel_g2_overflow.s
+#as:
+#ld: -e0
+#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_TLSLE_MOVW_TPREL_G2 against symbol `i' .*
+
diff --git a/ld/testsuite/ld-aarch64/tprel_g2_overflow.s b/ld/testsuite/ld-aarch64/tprel_g2_overflow.s
new file mode 100644
index 0000000..d94a30d
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tprel_g2_overflow.s
@@ -0,0 +1,22 @@
+	.cpu generic
+	.global	ff
+	.section	.tbss,"awT",%nobits
+	.align	3
+	.type	ff, %object
+	.size	ff, 562949953421312
+ff:
+	.zero	562949953421312
+	.global	i
+	.align	2
+	.type	i, %object
+	.size	i, 4
+i:
+	.zero	4
+	.text
+	.align	2
+	.global	main
+	.type	main, %function
+main:
+	movz	x0, #:tprel_g2:i
+	ret
+	.size	main, .-main