From: Simon Pilgrim Date: Sat, 13 Jun 2015 14:08:15 +0000 (+0000) Subject: [DAGCombiner] Added BSWAP vector constant folding support. X-Git-Tag: llvmorg-3.7.0-rc1~2422 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=011381d48b1a5d2bd85c54b697f902f958c181c2;p=platform%2Fupstream%2Fllvm.git [DAGCombiner] Added BSWAP vector constant folding support. llvm-svn: 239675 --- diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 3594335..1e33f1e 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -255,6 +255,7 @@ namespace { SDValue visitSRA(SDNode *N); SDValue visitSRL(SDNode *N); SDValue visitRotate(SDNode *N); + SDValue visitBSWAP(SDNode *N); SDValue visitCTLZ(SDNode *N); SDValue visitCTLZ_ZERO_UNDEF(SDNode *N); SDValue visitCTTZ(SDNode *N); @@ -1335,6 +1336,7 @@ SDValue DAGCombiner::visit(SDNode *N) { case ISD::SRL: return visitSRL(N); case ISD::ROTR: case ISD::ROTL: return visitRotate(N); + case ISD::BSWAP: return visitBSWAP(N); case ISD::CTLZ: return visitCTLZ(N); case ISD::CTLZ_ZERO_UNDEF: return visitCTLZ_ZERO_UNDEF(N); case ISD::CTTZ: return visitCTTZ(N); @@ -4764,6 +4766,16 @@ SDValue DAGCombiner::visitSRL(SDNode *N) { return SDValue(); } +SDValue DAGCombiner::visitBSWAP(SDNode *N) { + SDValue N0 = N->getOperand(0); + EVT VT = N->getValueType(0); + + // fold (bswap c1) -> c2 + if (isConstantIntBuildVectorOrConstantInt(N0)) + return DAG.getNode(ISD::BSWAP, SDLoc(N), VT, N0); + return SDValue(); +} + SDValue DAGCombiner::visitCTLZ(SDNode *N) { SDValue N0 = N->getOperand(0); EVT VT = N->getValueType(0); diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index cf51e756..27fa3d2 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -2932,6 +2932,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, case ISD::TRUNCATE: case ISD::UINT_TO_FP: case ISD::SINT_TO_FP: + case ISD::BSWAP: case ISD::CTLZ: case ISD::CTLZ_ZERO_UNDEF: case ISD::CTTZ: diff --git a/llvm/test/CodeGen/X86/bswap-vector.ll b/llvm/test/CodeGen/X86/bswap-vector.ll index 7d5f380..16da162 100644 --- a/llvm/test/CodeGen/X86/bswap-vector.ll +++ b/llvm/test/CodeGen/X86/bswap-vector.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -mcpu=x86-64 | FileCheck %s --check-prefix=CHECK-NOSSSE3 -; RUN: llc < %s -mcpu=core2 | FileCheck %s --check-prefix=CHECK-SSSE3 -; RUN: llc < %s -mcpu=core-avx2 | FileCheck %s --check-prefix=CHECK-AVX2 +; RUN: llc < %s -mcpu=x86-64 | FileCheck %s --check-prefix=CHECK-ALL --check-prefix=CHECK-SSE --check-prefix=CHECK-NOSSSE3 +; RUN: llc < %s -mcpu=core2 | FileCheck %s --check-prefix=CHECK-ALL --check-prefix=CHECK-SSE --check-prefix=CHECK-SSSE3 +; RUN: llc < %s -mcpu=core-avx2 | FileCheck %s --check-prefix=CHECK-AVX --check-prefix=CHECK-AVX2 ; RUN: llc < %s -mcpu=core-avx2 -x86-experimental-vector-widening-legalization | FileCheck %s --check-prefix=CHECK-WIDE-AVX2 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" @@ -285,3 +285,100 @@ entry: %r = call <4 x i16> @llvm.bswap.v4i16(<4 x i16> %v) ret <4 x i16> %r } + +; +; Constant Folding +; + +define <8 x i16> @fold_v8i16() { +; CHECK-SSE-LABEL: fold_v8i16: +; CHECK-SSE: # BB#0: # %entry +; CHECK-SSE-NEXT: movaps {{.*#+}} xmm0 = [0,256,65535,512,65023,1024,64511,1536] +; CHECK-SSE-NEXT: retq +; +; CHECK-AVX-LABEL: fold_v8i16: +; CHECK-AVX: # BB#0: # %entry +; CHECK-AVX-NEXT: vmovaps {{.*#+}} xmm0 = [0,256,65535,512,65023,1024,64511,1536] +; CHECK-AVX-NEXT: retq +entry: + %r = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> ) + ret <8 x i16> %r +} + +define <4 x i32> @fold_v4i32() { +; CHECK-SSE-LABEL: fold_v4i32: +; CHECK-SSE: # BB#0: # %entry +; CHECK-SSE-NEXT: movaps {{.*#+}} xmm0 = [0,4294967295,33554432,4261412863] +; CHECK-SSE-NEXT: retq +; +; CHECK-AVX-LABEL: fold_v4i32: +; CHECK-AVX: # BB#0: # %entry +; CHECK-AVX-NEXT: vmovaps {{.*#+}} xmm0 = [0,4294967295,33554432,4261412863] +; CHECK-AVX-NEXT: retq +entry: + %r = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> ) + ret <4 x i32> %r +} + +define <2 x i64> @fold_v2i64() { +; CHECK-SSE-LABEL: fold_v2i64: +; CHECK-SSE: # BB#0: # %entry +; CHECK-SSE-NEXT: movaps {{.*#+}} xmm0 = [18374686479671623680,18446744073709551615] +; CHECK-SSE-NEXT: retq +; +; CHECK-AVX-LABEL: fold_v2i64: +; CHECK-AVX: # BB#0: # %entry +; CHECK-AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18374686479671623680,18446744073709551615] +; CHECK-AVX-NEXT: retq +entry: + %r = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> ) + ret <2 x i64> %r +} + +define <16 x i16> @fold_v16i16() { +; CHECK-SSE-LABEL: fold_v16i16: +; CHECK-SSE: # BB#0: # %entry +; CHECK-SSE-NEXT: movaps {{.*#+}} xmm0 = [0,256,65535,512,65023,1024,64511,1536] +; CHECK-SSE-NEXT: movaps {{.*#+}} xmm1 = [63999,2048,63487,2560,62975,3072,62463,3584] +; CHECK-SSE-NEXT: retq +; +; CHECK-AVX-LABEL: fold_v16i16: +; CHECK-AVX: # BB#0: # %entry +; CHECK-AVX-NEXT: vmovaps {{.*#+}} ymm0 = [0,256,65535,512,65023,1024,64511,1536,63999,2048,63487,2560,62975,3072,62463,3584] +; CHECK-AVX-NEXT: retq +entry: + %r = call <16 x i16> @llvm.bswap.v16i16(<16 x i16> ) + ret <16 x i16> %r +} + +define <8 x i32> @fold_v8i32() { +; CHECK-SSE-LABEL: fold_v8i32: +; CHECK-SSE: # BB#0: # %entry +; CHECK-SSE-NEXT: movaps {{.*#+}} xmm0 = [0,16777216,4294967295,33554432] +; CHECK-SSE-NEXT: movaps {{.*#+}} xmm1 = [4261412863,67108864,4227858431,100663296] +; CHECK-SSE-NEXT: retq +; +; CHECK-AVX-LABEL: fold_v8i32: +; CHECK-AVX: # BB#0: # %entry +; CHECK-AVX-NEXT: vmovaps {{.*#+}} ymm0 = [0,16777216,4294967295,33554432,4261412863,67108864,4227858431,100663296] +; CHECK-AVX-NEXT: retq +entry: + %r = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> ) + ret <8 x i32> %r +} + +define <4 x i64> @fold_v4i64() { +; CHECK-SSE-LABEL: fold_v4i64: +; CHECK-SSE: # BB#0: # %entry +; CHECK-SSE-NEXT: movaps {{.*#+}} xmm0 = [18374686479671623680,18446744073709551615] +; CHECK-SSE-NEXT: movaps {{.*#+}} xmm1 = [18446462598732840960,72056494526300160] +; CHECK-SSE-NEXT: retq +; +; CHECK-AVX-LABEL: fold_v4i64: +; CHECK-AVX: # BB#0: # %entry +; CHECK-AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18374686479671623680,18446744073709551615,18446462598732840960,72056494526300160] +; CHECK-AVX-NEXT: retq +entry: + %r = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> ) + ret <4 x i64> %r +}