From: Rob Clark <robdclark@gmail.com>
Date: Fri, 17 Nov 2017 16:12:45 +0000 (-0500)
Subject: freedreno/a5xx/gmem: move ZS restore tiling hack
X-Git-Tag: upstream/18.1.0~3975
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=010ebed72aa82f930067bd49e4cc12469cc4eb6a;p=platform%2Fupstream%2Fmesa.git

freedreno/a5xx/gmem: move ZS restore tiling hack

Code motion to simplify next patch.

Signed-off-by: Rob Clark <robdclark@gmail.com>
---

diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
index 16c2f82..659127e 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
@@ -473,6 +473,27 @@ emit_mem2gmem_surf(struct fd_batch *batch, uint32_t base,
 
 	debug_assert(psurf->u.tex.first_layer == psurf->u.tex.last_layer);
 
+	if (buf == BLIT_ZS) {
+		// XXX hack import via BLIT_MRT0 instead of BLIT_ZS, since I don't
+		// know otherwise how to go from linear in sysmem to tiled in gmem.
+		// possibly we want to flip this around gmem2mem and keep depth
+		// tiled in sysmem (and fixup sampler state to assume tiled).. this
+		// might be required for doing depth/stencil in bypass mode?
+		struct fd_resource_slice *slice = fd_resource_slice(rsc, 0);
+		enum a5xx_color_fmt format =
+			fd5_pipe2color(fd_gmem_restore_format(rsc->base.b.format));
+
+		OUT_PKT4(ring, REG_A5XX_RB_MRT_BUF_INFO(0), 5);
+		OUT_RING(ring, A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) |
+				A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(TILE5_LINEAR) |
+				A5XX_RB_MRT_BUF_INFO_COLOR_SWAP(WZYX));
+		OUT_RING(ring, A5XX_RB_MRT_PITCH(slice->pitch * rsc->cpp));
+		OUT_RING(ring, A5XX_RB_MRT_ARRAY_PITCH(slice->size0));
+		OUT_RELOC(ring, rsc->bo, 0, 0, 0);  /* BASE_LO/HI */
+
+		buf = BLIT_MRT0;
+	}
+
 	stride = gmem->bin_w * rsc->cpp;
 	size = stride * gmem->bin_h;
 
@@ -529,27 +550,8 @@ fd5_emit_tile_mem2gmem(struct fd_batch *batch, struct fd_tile *tile)
 
 	if (fd_gmem_needs_restore(batch, tile, FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) {
 		struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture);
-		// XXX BLIT_ZS vs BLIT_Z32 .. need some more cmdstream traces
-		// with z32_x24s8..
-
-		// XXX hack import via BLIT_MRT0 instead of BLIT_ZS, since I don't
-		// know otherwise how to go from linear in sysmem to tiled in gmem.
-		// possibly we want to flip this around gmem2mem and keep depth
-		// tiled in sysmem (and fixup sampler state to assume tiled).. this
-		// might be required for doing depth/stencil in bypass mode?
-		struct fd_resource_slice *slice = fd_resource_slice(rsc, 0);
-		enum a5xx_color_fmt format =
-			fd5_pipe2color(fd_gmem_restore_format(pfb->zsbuf->format));
-
-		OUT_PKT4(ring, REG_A5XX_RB_MRT_BUF_INFO(0), 5);
-		OUT_RING(ring, A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) |
-				A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(TILE5_LINEAR) |
-				A5XX_RB_MRT_BUF_INFO_COLOR_SWAP(WZYX));
-		OUT_RING(ring, A5XX_RB_MRT_PITCH(slice->pitch * rsc->cpp));
-		OUT_RING(ring, A5XX_RB_MRT_ARRAY_PITCH(slice->size0));
-		OUT_RELOC(ring, rsc->bo, 0, 0, 0);  /* BASE_LO/HI */
 
-		emit_mem2gmem_surf(batch, ctx->gmem.zsbuf_base[0], pfb->zsbuf, BLIT_MRT0);
+		emit_mem2gmem_surf(batch, gmem->zsbuf_base[0], pfb->zsbuf, BLIT_ZS);
 	}
 }