From: Stephen Boyd Date: Fri, 17 Jan 2014 01:38:06 +0000 (-0800) Subject: clocksource: Timer-sun5i: Switch to sched_clock_register() X-Git-Tag: v3.14-rc1~169^2 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=00e2bcd6d35f59fce7fa0e76e24d08f74c6a8506;p=kernel%2Fkernel-generic.git clocksource: Timer-sun5i: Switch to sched_clock_register() The 32-bit sched_clock() interface supports 64 bits since 3.13-rc1. Upgrade to the 64-bit function to allow us to remove the 32-bit registration interface. Signed-off-by: Stephen Boyd Acked-by: Daniel Lezcano Cc: Maxime Ripard Cc: linux-arm-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/1389922686-6249-1-git-send-email-sboyd@codeaurora.org Signed-off-by: Ingo Molnar --- diff --git a/drivers/clocksource/timer-sun5i.c b/drivers/clocksource/timer-sun5i.c index bddc522..deebcd6 100644 --- a/drivers/clocksource/timer-sun5i.c +++ b/drivers/clocksource/timer-sun5i.c @@ -136,7 +136,7 @@ static struct irqaction sun5i_timer_irq = { .dev_id = &sun5i_clockevent, }; -static u32 sun5i_timer_sched_read(void) +static u64 sun5i_timer_sched_read(void) { return ~readl(timer_base + TIMER_CNTVAL_LO_REG(1)); } @@ -166,7 +166,7 @@ static void __init sun5i_timer_init(struct device_node *node) writel(TIMER_CTL_ENABLE | TIMER_CTL_RELOAD, timer_base + TIMER_CTL_REG(1)); - setup_sched_clock(sun5i_timer_sched_read, 32, rate); + sched_clock_register(sun5i_timer_sched_read, 32, rate); clocksource_mmio_init(timer_base + TIMER_CNTVAL_LO_REG(1), node->name, rate, 340, 32, clocksource_mmio_readl_down);