From: Simon Pilgrim Date: Sat, 1 Apr 2023 13:28:41 +0000 (+0100) Subject: [X86] Add AVX512F test coverage to vector-reduce-and-cmp.ll and vector-reduce-or... X-Git-Tag: upstream/17.0.6~12976 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=007d9ede8f648617d45eca21dbc4997a5d6f56d8;p=platform%2Fupstream%2Fllvm.git [X86] Add AVX512F test coverage to vector-reduce-and-cmp.ll and vector-reduce-or-cmp.ll --- diff --git a/llvm/test/CodeGen/X86/vector-reduce-and-cmp.ll b/llvm/test/CodeGen/X86/vector-reduce-and-cmp.ll index 5770c29..a3323ec 100644 --- a/llvm/test/CodeGen/X86/vector-reduce-and-cmp.ll +++ b/llvm/test/CodeGen/X86/vector-reduce-and-cmp.ll @@ -1,10 +1,11 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2 -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512 -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BWVL ; ; vXi64 @@ -1176,3 +1177,9 @@ declare i8 @llvm.vector.reduce.and.v16i8(<16 x i8>) declare i8 @llvm.vector.reduce.and.v32i8(<32 x i8>) declare i8 @llvm.vector.reduce.and.v64i8(<64 x i8>) declare i8 @llvm.vector.reduce.and.v128i8(<128 x i8>) +;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +; AVX512BW: {{.*}} +; AVX512BWVL: {{.*}} +; AVX512F: {{.*}} +; SSE2: {{.*}} +; SSE41: {{.*}} diff --git a/llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll b/llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll index d29756a..584bfd4 100644 --- a/llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll +++ b/llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll @@ -3,6 +3,7 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BWVL @@ -840,6 +841,12 @@ define i1 @trunc_v2i64(<2 x i64> %a0) { ; AVX2-NEXT: sete %al ; AVX2-NEXT: retq ; +; AVX512F-LABEL: trunc_v2i64: +; AVX512F: # %bb.0: +; AVX512F-NEXT: vptest {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 +; AVX512F-NEXT: sete %al +; AVX512F-NEXT: retq +; ; AVX512BW-LABEL: trunc_v2i64: ; AVX512BW: # %bb.0: ; AVX512BW-NEXT: vptest {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 @@ -1125,6 +1132,27 @@ define i32 @mask_v3i1(<3 x i32> %a, <3 x i32> %b) { ; AVX2-NEXT: movl $1, %eax ; AVX2-NEXT: retq ; +; AVX512F-LABEL: mask_v3i1: +; AVX512F: # %bb.0: +; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 +; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 +; AVX512F-NEXT: vpcmpneqd %zmm1, %zmm0, %k0 +; AVX512F-NEXT: kshiftrw $2, %k0, %k1 +; AVX512F-NEXT: korw %k1, %k0, %k1 +; AVX512F-NEXT: kshiftrw $1, %k0, %k0 +; AVX512F-NEXT: korw %k0, %k1, %k0 +; AVX512F-NEXT: kmovw %k0, %eax +; AVX512F-NEXT: testb $1, %al +; AVX512F-NEXT: je .LBB27_2 +; AVX512F-NEXT: # %bb.1: +; AVX512F-NEXT: xorl %eax, %eax +; AVX512F-NEXT: vzeroupper +; AVX512F-NEXT: retq +; AVX512F-NEXT: .LBB27_2: +; AVX512F-NEXT: movl $1, %eax +; AVX512F-NEXT: vzeroupper +; AVX512F-NEXT: retq +; ; AVX512BW-LABEL: mask_v3i1: ; AVX512BW: # %bb.0: ; AVX512BW-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1