From: Mauro Carvalho Chehab Date: Fri, 1 May 2020 12:17:21 +0000 (+0200) Subject: media: atomisp: remove some file duplication and do more dir renames X-Git-Tag: v5.10.7~2096^2~188 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=0057131fea6ddf9583baf9b7defa0ce2e51e9b7e;p=platform%2Fkernel%2Flinux-rpi.git media: atomisp: remove some file duplication and do more dir renames There are currently two identical copies of some files, one at css_2401_csi2p_system/ and another one at css_2401_system/. Get rid of one of them, moving the remaining files to the directory with the shortest name. While here, do more renames, in order to get smaller path names. Signed-off-by: Mauro Carvalho Chehab --- diff --git a/drivers/staging/media/atomisp/Makefile b/drivers/staging/media/atomisp/Makefile index 3c1c9bc..d166b5f 100644 --- a/drivers/staging/media/atomisp/Makefile +++ b/drivers/staging/media/atomisp/Makefile @@ -159,9 +159,9 @@ atomisp-objs += \ pci/hive_isp_css_shared/host/tag.o \ obj-byt = \ - pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.o \ - pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.o \ - pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.o \ + pci/css_2400_system/hive/ia_css_isp_configs.o \ + pci/css_2400_system/hive/ia_css_isp_params.o \ + pci/css_2400_system/hive/ia_css_isp_states.o \ pci/css_2400_system/spmem_dump.o \ # These will be needed when clean merge CHT support nicely into the driver @@ -170,19 +170,15 @@ obj-byt = \ obj-cht = \ pci/css_2401_system/spmem_dump.o \ - pci/css_2401_csi2p_system/spmem_dump.o \ - pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.o \ - pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.o \ - pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.o \ - pci/css_2401_csi2p_system/host/csi_rx.o \ - pci/css_2401_csi2p_system/host/ibuf_ctrl.o \ - pci/css_2401_csi2p_system/host/isys_dma.o \ - pci/css_2401_csi2p_system/host/isys_irq.o \ - pci/css_2401_csi2p_system/host/isys_stream2mmio.o - -# pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.o \ -# pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.o \ -# pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.o \ + pci/css_2401_system/spmem_dump.o \ + pci/css_2401_system/hive/ia_css_isp_configs.o \ + pci/css_2401_system/hive/ia_css_isp_params.o \ + pci/css_2401_system/hive/ia_css_isp_states.o \ + pci/css_2401_system/host/csi_rx.o \ + pci/css_2401_system/host/ibuf_ctrl.o \ + pci/css_2401_system/host/isys_dma.o \ + pci/css_2401_system/host/isys_irq.o \ + pci/css_2401_system/host/isys_stream2mmio.o INCLUDES += \ -I$(atomisp)/ \ @@ -320,14 +316,14 @@ INCLUDES += \ INCLUDES_byt += \ -I$(atomisp)/pci/css_2400_system/ \ - -I$(atomisp)/pci/css_2400_system/hive_isp_css_2400_system_generated/ \ + -I$(atomisp)/pci/css_2400_system/hive/ \ -I$(atomisp)/pci/css_2400_system/hrt/ \ INCLUDES_cht += \ - -I$(atomisp)/pci/css_2401_csi2p_system/ \ - -I$(atomisp)/pci/css_2401_csi2p_system/host/ \ - -I$(atomisp)/pci/css_2401_csi2p_system/hive_isp_css_2400_system_generated/ \ - -I$(atomisp)/pci/css_2401_csi2p_system/hrt/ \ + -I$(atomisp)/pci/css_2401_system/ \ + -I$(atomisp)/pci/css_2401_system/host/ \ + -I$(atomisp)/pci/css_2401_system/hive/ \ + -I$(atomisp)/pci/css_2401_system/hrt/ \ # -I$(atomisp)/pci/css_2401_system/hrt/ \ # -I$(atomisp)/pci/css_2401_system/hive_isp_css_2401_system_generated/ \ diff --git a/drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_configs.c similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c rename to drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_configs.c diff --git a/drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_params.c similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c rename to drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_params.c diff --git a/drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.c b/drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_states.c similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.c rename to drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_states.c diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c deleted file mode 100644 index cd37e7e..0000000 --- a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c +++ /dev/null @@ -1,413 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/* Generated code: do not edit or commmit. */ - -#define IA_CSS_INCLUDE_CONFIGURATIONS -#include "ia_css_pipeline.h" -#include "ia_css_isp_configs.h" -#include "ia_css_debug.h" -#include "assert_support.h" - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_iterator( - const struct ia_css_binary *binary, - const struct ia_css_iterator_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_iterator() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.iterator.size; - offset = binary->info->mem_offsets.offsets.config->dmem.iterator.offset; - } - if (size) { - ia_css_iterator_config((struct sh_css_isp_iterator_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_iterator() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_copy_output( - const struct ia_css_binary *binary, - const struct ia_css_copy_output_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_copy_output() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.copy_output.size; - offset = binary->info->mem_offsets.offsets.config->dmem.copy_output.offset; - } - if (size) { - ia_css_copy_output_config((struct sh_css_isp_copy_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_copy_output() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_crop( - const struct ia_css_binary *binary, - const struct ia_css_crop_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_crop() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.crop.size; - offset = binary->info->mem_offsets.offsets.config->dmem.crop.offset; - } - if (size) { - ia_css_crop_config((struct sh_css_isp_crop_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_crop() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_fpn( - const struct ia_css_binary *binary, - const struct ia_css_fpn_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_fpn() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.fpn.size; - offset = binary->info->mem_offsets.offsets.config->dmem.fpn.offset; - } - if (size) { - ia_css_fpn_config((struct sh_css_isp_fpn_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_fpn() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_dvs( - const struct ia_css_binary *binary, - const struct ia_css_dvs_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_dvs() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.dvs.size; - offset = binary->info->mem_offsets.offsets.config->dmem.dvs.offset; - } - if (size) { - ia_css_dvs_config((struct sh_css_isp_dvs_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_dvs() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_qplane( - const struct ia_css_binary *binary, - const struct ia_css_qplane_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_qplane() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.qplane.size; - offset = binary->info->mem_offsets.offsets.config->dmem.qplane.offset; - } - if (size) { - ia_css_qplane_config((struct sh_css_isp_qplane_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_qplane() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output0( - const struct ia_css_binary *binary, - const struct ia_css_output0_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output0() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.output0.size; - offset = binary->info->mem_offsets.offsets.config->dmem.output0.offset; - } - if (size) { - ia_css_output0_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output0() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output1( - const struct ia_css_binary *binary, - const struct ia_css_output1_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output1() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.output1.size; - offset = binary->info->mem_offsets.offsets.config->dmem.output1.offset; - } - if (size) { - ia_css_output1_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output1() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output( - const struct ia_css_binary *binary, - const struct ia_css_output_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.output.size; - offset = binary->info->mem_offsets.offsets.config->dmem.output.offset; - } - if (size) { - ia_css_output_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_sc( - const struct ia_css_binary *binary, - const struct ia_css_sc_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_sc() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.sc.size; - offset = binary->info->mem_offsets.offsets.config->dmem.sc.offset; - } - if (size) { - ia_css_sc_config((struct sh_css_isp_sc_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_sc() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_raw( - const struct ia_css_binary *binary, - const struct ia_css_raw_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_raw() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.raw.size; - offset = binary->info->mem_offsets.offsets.config->dmem.raw.offset; - } - if (size) { - ia_css_raw_config((struct sh_css_isp_raw_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_raw() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_tnr( - const struct ia_css_binary *binary, - const struct ia_css_tnr_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_tnr() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.tnr.size; - offset = binary->info->mem_offsets.offsets.config->dmem.tnr.offset; - } - if (size) { - ia_css_tnr_config((struct sh_css_isp_tnr_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_tnr() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_ref( - const struct ia_css_binary *binary, - const struct ia_css_ref_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_ref() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.ref.size; - offset = binary->info->mem_offsets.offsets.config->dmem.ref.offset; - } - if (size) { - ia_css_ref_config((struct sh_css_isp_ref_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_ref() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_vf( - const struct ia_css_binary *binary, - const struct ia_css_vf_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_vf() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.vf.size; - offset = binary->info->mem_offsets.offsets.config->dmem.vf.offset; - } - if (size) { - ia_css_vf_config((struct sh_css_isp_vf_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_vf() leave:\n"); -} diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c deleted file mode 100644 index 6829729..0000000 --- a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c +++ /dev/null @@ -1,3366 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#define IA_CSS_INCLUDE_PARAMETERS -#include "sh_css_params.h" -#include "isp/kernels/aa/aa_2/ia_css_aa2.host.h" -#include "isp/kernels/anr/anr_1.0/ia_css_anr.host.h" -#include "isp/kernels/anr/anr_2/ia_css_anr2.host.h" -#include "isp/kernels/bh/bh_2/ia_css_bh.host.h" -#include "isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h" -#include "isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h" -#include "isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h" -#include "isp/kernels/crop/crop_1.0/ia_css_crop.host.h" -#include "isp/kernels/csc/csc_1.0/ia_css_csc.host.h" -#include "isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.h" -#include "isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h" -#include "isp/kernels/ctc/ctc2/ia_css_ctc2.host.h" -#include "isp/kernels/de/de_1.0/ia_css_de.host.h" -#include "isp/kernels/de/de_2/ia_css_de2.host.h" -#include "isp/kernels/dp/dp_1.0/ia_css_dp.host.h" -#include "isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h" -#include "isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h" -#include "isp/kernels/gc/gc_1.0/ia_css_gc.host.h" -#include "isp/kernels/gc/gc_2/ia_css_gc2.host.h" -#include "isp/kernels/macc/macc_1.0/ia_css_macc.host.h" -#include "isp/kernels/macc/macc1_5/ia_css_macc1_5.host.h" -#include "isp/kernels/ob/ob_1.0/ia_css_ob.host.h" -#include "isp/kernels/ob/ob2/ia_css_ob2.host.h" -#include "isp/kernels/output/output_1.0/ia_css_output.host.h" -#include "isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.h" -#include "isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h" -#include "isp/kernels/sc/sc_1.0/ia_css_sc.host.h" -#include "isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.h" -#include "isp/kernels/sdis/sdis_2/ia_css_sdis2.host.h" -#include "isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h" -#include "isp/kernels/uds/uds_1.0/ia_css_uds_param.h" -#include "isp/kernels/wb/wb_1.0/ia_css_wb.host.h" -#include "isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h" -#include "isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h" -#include "isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h" -#include "isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h" -#include "isp/kernels/fc/fc_1.0/ia_css_formats.host.h" -#include "isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h" -#include "isp/kernels/dpc2/ia_css_dpc2.host.h" -#include "isp/kernels/eed1_8/ia_css_eed1_8.host.h" -#include "isp/kernels/bnlm/ia_css_bnlm.host.h" -#include "isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h" -/* Generated code: do not edit or commmit. */ - -#include "ia_css_pipeline.h" -#include "ia_css_isp_params.h" -#include "ia_css_debug.h" -#include "assert_support.h" - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_aa( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; - - if (size) { - struct sh_css_isp_aa_params *t = (struct sh_css_isp_aa_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; - t->strength = params->aa_config.strength; - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_anr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_anr() enter:\n"); - - ia_css_anr_encode((struct sh_css_isp_anr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->anr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_anr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_anr2( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.anr2.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.anr2.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_anr2() enter:\n"); - - ia_css_anr2_vmem_encode((struct ia_css_isp_anr2_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->anr_thres, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_anr2() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_bh( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.bh.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.bh.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); - - ia_css_bh_encode((struct sh_css_isp_bh_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->s3a_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); - } - } - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->hmem0.bh.size; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); - - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_HMEM0] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_cnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.cnr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.cnr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_cnr() enter:\n"); - - ia_css_cnr_encode((struct sh_css_isp_cnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->cnr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_cnr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_crop( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.crop.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.crop.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_crop() enter:\n"); - - ia_css_crop_encode((struct sh_css_isp_crop_isp_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->crop_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_crop() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_csc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.csc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.csc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_csc() enter:\n"); - - ia_css_csc_encode((struct sh_css_isp_csc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->cc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_csc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_dp( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() enter:\n"); - - ia_css_dp_encode((struct sh_css_isp_dp_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dp_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_bnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.bnr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.bnr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_bnr() enter:\n"); - - ia_css_bnr_encode((struct sh_css_isp_bnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->nr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_bnr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_de( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.de.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.de.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() enter:\n"); - - ia_css_de_encode((struct sh_css_isp_de_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->de_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_ecd( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.ecd.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.ecd.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ecd() enter:\n"); - - ia_css_ecd_encode((struct sh_css_isp_ecd_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ecd_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ecd() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_formats( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.formats.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.formats.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_formats() enter:\n"); - - ia_css_formats_encode((struct sh_css_isp_formats_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->formats_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_formats() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_fpn( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.fpn.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.fpn.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_fpn() enter:\n"); - - ia_css_fpn_encode((struct sh_css_isp_fpn_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->fpn_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_fpn() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_gc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.gc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.gc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); - - ia_css_gc_encode((struct sh_css_isp_gc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->gc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); - } - } - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem1.gc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem1.gc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); - - ia_css_gc_vamem_encode((struct sh_css_isp_gc_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], - ¶ms->gc_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_ce( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.ce.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.ce.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() enter:\n"); - - ia_css_ce_encode((struct sh_css_isp_ce_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ce_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_yuv2rgb( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_yuv2rgb() enter:\n"); - - ia_css_yuv2rgb_encode((struct sh_css_isp_csc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->yuv2rgb_cc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_yuv2rgb() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_rgb2yuv( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_rgb2yuv() enter:\n"); - - ia_css_rgb2yuv_encode((struct sh_css_isp_csc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->rgb2yuv_cc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_rgb2yuv() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_r_gamma( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_r_gamma() enter:\n"); - - ia_css_r_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], - ¶ms->r_gamma_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_r_gamma() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_g_gamma( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_g_gamma() enter:\n"); - - ia_css_g_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], - ¶ms->g_gamma_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_g_gamma() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_b_gamma( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_b_gamma() enter:\n"); - - ia_css_b_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM2].address[offset], - ¶ms->b_gamma_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM2] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_b_gamma() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_uds( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.uds.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.uds.offset; - - if (size) { - struct sh_css_sp_uds_params *p; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_uds() enter:\n"); - - p = (struct sh_css_sp_uds_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; - p->crop_pos = params->uds_config.crop_pos; - p->uds = params->uds_config.uds; - - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_uds() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_raa( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.raa.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.raa.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_raa() enter:\n"); - - ia_css_raa_encode((struct sh_css_isp_aa_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->raa_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_raa() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_s3a( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.s3a.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.s3a.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_s3a() enter:\n"); - - ia_css_s3a_encode((struct sh_css_isp_s3a_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->s3a_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_s3a() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_ob( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.ob.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.ob.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); - - ia_css_ob_encode((struct sh_css_isp_ob_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ob_config, - ¶ms->stream_configs.ob, size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); - } - } - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.ob.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.ob.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); - - ia_css_ob_vmem_encode((struct sh_css_isp_ob_vmem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->ob_config, - ¶ms->stream_configs.ob, size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_output( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.output.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.output.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_output() enter:\n"); - - ia_css_output_encode((struct sh_css_isp_output_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->output_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_output() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.sc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.sc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() enter:\n"); - - ia_css_sc_encode((struct sh_css_isp_sc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->sc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_bds( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.bds.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.bds.offset; - - if (size) { - struct sh_css_isp_bds_params *p; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_bds() enter:\n"); - - p = (struct sh_css_isp_bds_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; - p->baf_strength = params->bds_config.strength; - - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_bds() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_tnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.tnr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.tnr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_tnr() enter:\n"); - - ia_css_tnr_encode((struct sh_css_isp_tnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->tnr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_tnr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_macc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.macc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.macc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_macc() enter:\n"); - - ia_css_macc_encode((struct sh_css_isp_macc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->macc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_macc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis_horicoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_horicoef() enter:\n"); - - ia_css_sdis_horicoef_vmem_encode((struct sh_css_isp_sdis_hori_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_horicoef() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis_vertcoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_vertcoef() enter:\n"); - - ia_css_sdis_vertcoef_vmem_encode((struct sh_css_isp_sdis_vert_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_vertcoef() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis_horiproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_horiproj() enter:\n"); - - ia_css_sdis_horiproj_encode((struct sh_css_isp_sdis_hori_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_horiproj() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis_vertproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_vertproj() enter:\n"); - - ia_css_sdis_vertproj_encode((struct sh_css_isp_sdis_vert_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_vertproj() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis2_horicoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_horicoef() enter:\n"); - - ia_css_sdis2_horicoef_vmem_encode((struct sh_css_isp_sdis_hori_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs2_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_horicoef() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis2_vertcoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_vertcoef() enter:\n"); - - ia_css_sdis2_vertcoef_vmem_encode((struct sh_css_isp_sdis_vert_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs2_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_vertcoef() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis2_horiproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_horiproj() enter:\n"); - - ia_css_sdis2_horiproj_encode((struct sh_css_isp_sdis_hori_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs2_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_horiproj() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis2_vertproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_vertproj() enter:\n"); - - ia_css_sdis2_vertproj_encode((struct sh_css_isp_sdis_vert_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs2_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_vertproj() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_wb( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.wb.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.wb.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() enter:\n"); - - ia_css_wb_encode((struct sh_css_isp_wb_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->wb_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_nr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.nr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.nr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() enter:\n"); - - ia_css_nr_encode((struct sh_css_isp_ynr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->nr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_yee( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.yee.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.yee.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_yee() enter:\n"); - - ia_css_yee_encode((struct sh_css_isp_yee_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->yee_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_yee() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_ynr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.ynr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.ynr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ynr() enter:\n"); - - ia_css_ynr_encode((struct sh_css_isp_yee2_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ynr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ynr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_fc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.fc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.fc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() enter:\n"); - - ia_css_fc_encode((struct sh_css_isp_fc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->fc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_ctc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.ctc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.ctc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ctc() enter:\n"); - - ia_css_ctc_encode((struct sh_css_isp_ctc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ctc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ctc() leave:\n"); - } - } - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ctc() enter:\n"); - - ia_css_ctc_vamem_encode((struct sh_css_isp_ctc_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], - ¶ms->ctc_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ctc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_xnr_table( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr_table() enter:\n"); - - ia_css_xnr_table_vamem_encode((struct sh_css_isp_xnr_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], - ¶ms->xnr_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr_table() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_xnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.xnr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.xnr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr() enter:\n"); - - ia_css_xnr_encode((struct sh_css_isp_xnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->xnr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_xnr3( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr3() enter:\n"); - - ia_css_xnr3_encode((struct sh_css_isp_xnr3_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->xnr3_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr3() leave:\n"); - } - } - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr3() enter:\n"); - - ia_css_xnr3_vmem_encode((struct sh_css_isp_xnr3_vmem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->xnr3_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr3() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_param_process_table() */ - -void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) = { - ia_css_process_aa, - ia_css_process_anr, - ia_css_process_anr2, - ia_css_process_bh, - ia_css_process_cnr, - ia_css_process_crop, - ia_css_process_csc, - ia_css_process_dp, - ia_css_process_bnr, - ia_css_process_de, - ia_css_process_ecd, - ia_css_process_formats, - ia_css_process_fpn, - ia_css_process_gc, - ia_css_process_ce, - ia_css_process_yuv2rgb, - ia_css_process_rgb2yuv, - ia_css_process_r_gamma, - ia_css_process_g_gamma, - ia_css_process_b_gamma, - ia_css_process_uds, - ia_css_process_raa, - ia_css_process_s3a, - ia_css_process_ob, - ia_css_process_output, - ia_css_process_sc, - ia_css_process_bds, - ia_css_process_tnr, - ia_css_process_macc, - ia_css_process_sdis_horicoef, - ia_css_process_sdis_vertcoef, - ia_css_process_sdis_horiproj, - ia_css_process_sdis_vertproj, - ia_css_process_sdis2_horicoef, - ia_css_process_sdis2_vertcoef, - ia_css_process_sdis2_horiproj, - ia_css_process_sdis2_vertproj, - ia_css_process_wb, - ia_css_process_nr, - ia_css_process_yee, - ia_css_process_ynr, - ia_css_process_fc, - ia_css_process_ctc, - ia_css_process_xnr_table, - ia_css_process_xnr, - ia_css_process_xnr3, -}; - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_dp_config(const struct ia_css_isp_parameters *params, - struct ia_css_dp_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_dp_config() enter: config=%p\n", - config); - - *config = params->dp_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_dp_config() leave\n"); - ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_dp_config(struct ia_css_isp_parameters *params, - const struct ia_css_dp_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_dp_config() enter:\n"); - ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dp_config = *config; - params->config_changed[IA_CSS_DP_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_dp_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_wb_config(const struct ia_css_isp_parameters *params, - struct ia_css_wb_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_wb_config() enter: config=%p\n", - config); - - *config = params->wb_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_wb_config() leave\n"); - ia_css_wb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_wb_config(struct ia_css_isp_parameters *params, - const struct ia_css_wb_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_wb_config() enter:\n"); - ia_css_wb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->wb_config = *config; - params->config_changed[IA_CSS_WB_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_wb_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_tnr_config(const struct ia_css_isp_parameters *params, - struct ia_css_tnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_tnr_config() enter: config=%p\n", - config); - - *config = params->tnr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_tnr_config() leave\n"); - ia_css_tnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_tnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_tnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_tnr_config() enter:\n"); - ia_css_tnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->tnr_config = *config; - params->config_changed[IA_CSS_TNR_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_tnr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_ob_config(const struct ia_css_isp_parameters *params, - struct ia_css_ob_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ob_config() enter: config=%p\n", - config); - - *config = params->ob_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ob_config() leave\n"); - ia_css_ob_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ob_config(struct ia_css_isp_parameters *params, - const struct ia_css_ob_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ob_config() enter:\n"); - ia_css_ob_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->ob_config = *config; - params->config_changed[IA_CSS_OB_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_ob_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_de_config(const struct ia_css_isp_parameters *params, - struct ia_css_de_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_de_config() enter: config=%p\n", - config); - - *config = params->de_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_de_config() leave\n"); - ia_css_de_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_de_config(struct ia_css_isp_parameters *params, - const struct ia_css_de_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_de_config() enter:\n"); - ia_css_de_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->de_config = *config; - params->config_changed[IA_CSS_DE_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_de_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_anr_config(const struct ia_css_isp_parameters *params, - struct ia_css_anr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_anr_config() enter: config=%p\n", - config); - - *config = params->anr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_anr_config() leave\n"); - ia_css_anr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_anr_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_anr_config() enter:\n"); - ia_css_anr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->anr_config = *config; - params->config_changed[IA_CSS_ANR_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_anr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_anr2_config(const struct ia_css_isp_parameters *params, - struct ia_css_anr_thres *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_anr2_config() enter: config=%p\n", - config); - - *config = params->anr_thres; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_anr2_config() leave\n"); - ia_css_anr2_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_anr2_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_thres *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_anr2_config() enter:\n"); - ia_css_anr2_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->anr_thres = *config; - params->config_changed[IA_CSS_ANR2_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_anr2_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_ce_config(const struct ia_css_isp_parameters *params, - struct ia_css_ce_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ce_config() enter: config=%p\n", - config); - - *config = params->ce_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ce_config() leave\n"); - ia_css_ce_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ce_config(struct ia_css_isp_parameters *params, - const struct ia_css_ce_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ce_config() enter:\n"); - ia_css_ce_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->ce_config = *config; - params->config_changed[IA_CSS_CE_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_ce_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_ecd_config(const struct ia_css_isp_parameters *params, - struct ia_css_ecd_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ecd_config() enter: config=%p\n", - config); - - *config = params->ecd_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ecd_config() leave\n"); - ia_css_ecd_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ecd_config(struct ia_css_isp_parameters *params, - const struct ia_css_ecd_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ecd_config() enter:\n"); - ia_css_ecd_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->ecd_config = *config; - params->config_changed[IA_CSS_ECD_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_ecd_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_ynr_config(const struct ia_css_isp_parameters *params, - struct ia_css_ynr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ynr_config() enter: config=%p\n", - config); - - *config = params->ynr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ynr_config() leave\n"); - ia_css_ynr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ynr_config(struct ia_css_isp_parameters *params, - const struct ia_css_ynr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ynr_config() enter:\n"); - ia_css_ynr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->ynr_config = *config; - params->config_changed[IA_CSS_YNR_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_ynr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_fc_config(const struct ia_css_isp_parameters *params, - struct ia_css_fc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_fc_config() enter: config=%p\n", - config); - - *config = params->fc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_fc_config() leave\n"); - ia_css_fc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_fc_config(struct ia_css_isp_parameters *params, - const struct ia_css_fc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_fc_config() enter:\n"); - ia_css_fc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->fc_config = *config; - params->config_changed[IA_CSS_FC_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_fc_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_cnr_config(const struct ia_css_isp_parameters *params, - struct ia_css_cnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_cnr_config() enter: config=%p\n", - config); - - *config = params->cnr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_cnr_config() leave\n"); - ia_css_cnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_cnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_cnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_cnr_config() enter:\n"); - ia_css_cnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->cnr_config = *config; - params->config_changed[IA_CSS_CNR_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_cnr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_macc_config(const struct ia_css_isp_parameters *params, - struct ia_css_macc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_macc_config() enter: config=%p\n", - config); - - *config = params->macc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_macc_config() leave\n"); - ia_css_macc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_macc_config(struct ia_css_isp_parameters *params, - const struct ia_css_macc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_macc_config() enter:\n"); - ia_css_macc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->macc_config = *config; - params->config_changed[IA_CSS_MACC_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_macc_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_ctc_config(const struct ia_css_isp_parameters *params, - struct ia_css_ctc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ctc_config() enter: config=%p\n", - config); - - *config = params->ctc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ctc_config() leave\n"); - ia_css_ctc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ctc_config(struct ia_css_isp_parameters *params, - const struct ia_css_ctc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ctc_config() enter:\n"); - ia_css_ctc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->ctc_config = *config; - params->config_changed[IA_CSS_CTC_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_ctc_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_aa_config(const struct ia_css_isp_parameters *params, - struct ia_css_aa_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_aa_config() enter: config=%p\n", - config); - - *config = params->aa_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_aa_config() leave\n"); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_aa_config(struct ia_css_isp_parameters *params, - const struct ia_css_aa_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_aa_config() enter:\n"); - params->aa_config = *config; - params->config_changed[IA_CSS_AA_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_aa_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_yuv2rgb_config(const struct ia_css_isp_parameters *params, - struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_yuv2rgb_config() enter: config=%p\n", - config); - - *config = params->yuv2rgb_cc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_yuv2rgb_config() leave\n"); - ia_css_yuv2rgb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_yuv2rgb_config() enter:\n"); - ia_css_yuv2rgb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->yuv2rgb_cc_config = *config; - params->config_changed[IA_CSS_YUV2RGB_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_yuv2rgb_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_rgb2yuv_config(const struct ia_css_isp_parameters *params, - struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_rgb2yuv_config() enter: config=%p\n", - config); - - *config = params->rgb2yuv_cc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_rgb2yuv_config() leave\n"); - ia_css_rgb2yuv_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_rgb2yuv_config() enter:\n"); - ia_css_rgb2yuv_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->rgb2yuv_cc_config = *config; - params->config_changed[IA_CSS_RGB2YUV_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_rgb2yuv_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_csc_config(const struct ia_css_isp_parameters *params, - struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_csc_config() enter: config=%p\n", - config); - - *config = params->cc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_csc_config() leave\n"); - ia_css_csc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_csc_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_csc_config() enter:\n"); - ia_css_csc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->cc_config = *config; - params->config_changed[IA_CSS_CSC_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_csc_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_nr_config(const struct ia_css_isp_parameters *params, - struct ia_css_nr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_nr_config() enter: config=%p\n", - config); - - *config = params->nr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_nr_config() leave\n"); - ia_css_nr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_nr_config(struct ia_css_isp_parameters *params, - const struct ia_css_nr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_nr_config() enter:\n"); - ia_css_nr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->nr_config = *config; - params->config_changed[IA_CSS_BNR_ID] = true; - params->config_changed[IA_CSS_NR_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_nr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_gc_config(const struct ia_css_isp_parameters *params, - struct ia_css_gc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_gc_config() enter: config=%p\n", - config); - - *config = params->gc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_gc_config() leave\n"); - ia_css_gc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_gc_config(struct ia_css_isp_parameters *params, - const struct ia_css_gc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_gc_config() enter:\n"); - ia_css_gc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->gc_config = *config; - params->config_changed[IA_CSS_GC_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_gc_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis_horicoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_horicoef_config() enter: config=%p\n", - config); - - *config = params->dvs_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_horicoef_config() leave\n"); - ia_css_sdis_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis_horicoef_config() enter:\n"); - ia_css_sdis_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs_coefs = *config; - params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis_horicoef_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis_vertcoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_vertcoef_config() enter: config=%p\n", - config); - - *config = params->dvs_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_vertcoef_config() leave\n"); - ia_css_sdis_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis_vertcoef_config() enter:\n"); - ia_css_sdis_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs_coefs = *config; - params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis_vertcoef_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis_horiproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_horiproj_config() enter: config=%p\n", - config); - - *config = params->dvs_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_horiproj_config() leave\n"); - ia_css_sdis_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis_horiproj_config() enter:\n"); - ia_css_sdis_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs_coefs = *config; - params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis_horiproj_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis_vertproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_vertproj_config() enter: config=%p\n", - config); - - *config = params->dvs_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_vertproj_config() leave\n"); - ia_css_sdis_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis_vertproj_config() enter:\n"); - ia_css_sdis_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs_coefs = *config; - params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis_vertproj_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis2_horicoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_horicoef_config() enter: config=%p\n", - config); - - *config = params->dvs2_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_horicoef_config() leave\n"); - ia_css_sdis2_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis2_horicoef_config() enter:\n"); - ia_css_sdis2_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs2_coefs = *config; - params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis2_horicoef_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis2_vertcoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_vertcoef_config() enter: config=%p\n", - config); - - *config = params->dvs2_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_vertcoef_config() leave\n"); - ia_css_sdis2_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis2_vertcoef_config() enter:\n"); - ia_css_sdis2_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs2_coefs = *config; - params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis2_vertcoef_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis2_horiproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_horiproj_config() enter: config=%p\n", - config); - - *config = params->dvs2_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_horiproj_config() leave\n"); - ia_css_sdis2_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis2_horiproj_config() enter:\n"); - ia_css_sdis2_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs2_coefs = *config; - params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis2_horiproj_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis2_vertproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_vertproj_config() enter: config=%p\n", - config); - - *config = params->dvs2_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_vertproj_config() leave\n"); - ia_css_sdis2_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis2_vertproj_config() enter:\n"); - ia_css_sdis2_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs2_coefs = *config; - params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis2_vertproj_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_r_gamma_config(const struct ia_css_isp_parameters *params, - struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_r_gamma_config() enter: config=%p\n", - config); - - *config = params->r_gamma_table; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_r_gamma_config() leave\n"); - ia_css_r_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_r_gamma_config() enter:\n"); - ia_css_r_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->r_gamma_table = *config; - params->config_changed[IA_CSS_R_GAMMA_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_r_gamma_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_g_gamma_config(const struct ia_css_isp_parameters *params, - struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_g_gamma_config() enter: config=%p\n", - config); - - *config = params->g_gamma_table; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_g_gamma_config() leave\n"); - ia_css_g_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_g_gamma_config() enter:\n"); - ia_css_g_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->g_gamma_table = *config; - params->config_changed[IA_CSS_G_GAMMA_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_g_gamma_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_b_gamma_config(const struct ia_css_isp_parameters *params, - struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_b_gamma_config() enter: config=%p\n", - config); - - *config = params->b_gamma_table; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_b_gamma_config() leave\n"); - ia_css_b_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_b_gamma_config() enter:\n"); - ia_css_b_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->b_gamma_table = *config; - params->config_changed[IA_CSS_B_GAMMA_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_b_gamma_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_xnr_table_config(const struct ia_css_isp_parameters *params, - struct ia_css_xnr_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr_table_config() enter: config=%p\n", - config); - - *config = params->xnr_table; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr_table_config() leave\n"); - ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_xnr_table_config() enter:\n"); - ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->xnr_table = *config; - params->config_changed[IA_CSS_XNR_TABLE_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_xnr_table_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_formats_config(const struct ia_css_isp_parameters *params, - struct ia_css_formats_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_formats_config() enter: config=%p\n", - config); - - *config = params->formats_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_formats_config() leave\n"); - ia_css_formats_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_formats_config(struct ia_css_isp_parameters *params, - const struct ia_css_formats_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_formats_config() enter:\n"); - ia_css_formats_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->formats_config = *config; - params->config_changed[IA_CSS_FORMATS_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_formats_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_xnr_config(const struct ia_css_isp_parameters *params, - struct ia_css_xnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr_config() enter: config=%p\n", - config); - - *config = params->xnr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr_config() leave\n"); - ia_css_xnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_xnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr_config() enter:\n"); - ia_css_xnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->xnr_config = *config; - params->config_changed[IA_CSS_XNR_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_xnr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_xnr3_config(const struct ia_css_isp_parameters *params, - struct ia_css_xnr3_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr3_config() enter: config=%p\n", - config); - - *config = params->xnr3_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr3_config() leave\n"); - ia_css_xnr3_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr3_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr3_config() enter:\n"); - ia_css_xnr3_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->xnr3_config = *config; - params->config_changed[IA_CSS_XNR3_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_xnr3_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_s3a_config(const struct ia_css_isp_parameters *params, - struct ia_css_3a_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_s3a_config() enter: config=%p\n", - config); - - *config = params->s3a_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_s3a_config() leave\n"); - ia_css_s3a_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_s3a_config(struct ia_css_isp_parameters *params, - const struct ia_css_3a_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_s3a_config() enter:\n"); - ia_css_s3a_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->s3a_config = *config; - params->config_changed[IA_CSS_BH_ID] = true; - params->config_changed[IA_CSS_S3A_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_s3a_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_output_config(const struct ia_css_isp_parameters *params, - struct ia_css_output_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_output_config() enter: config=%p\n", - config); - - *config = params->output_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_output_config() leave\n"); - ia_css_output_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_output_config(struct ia_css_isp_parameters *params, - const struct ia_css_output_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_output_config() enter:\n"); - ia_css_output_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->output_config = *config; - params->config_changed[IA_CSS_OUTPUT_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_output_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_global_access_function() */ - -void -ia_css_get_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) -{ - ia_css_get_dp_config(params, config->dp_config); - ia_css_get_wb_config(params, config->wb_config); - ia_css_get_tnr_config(params, config->tnr_config); - ia_css_get_ob_config(params, config->ob_config); - ia_css_get_de_config(params, config->de_config); - ia_css_get_anr_config(params, config->anr_config); - ia_css_get_anr2_config(params, config->anr_thres); - ia_css_get_ce_config(params, config->ce_config); - ia_css_get_ecd_config(params, config->ecd_config); - ia_css_get_ynr_config(params, config->ynr_config); - ia_css_get_fc_config(params, config->fc_config); - ia_css_get_cnr_config(params, config->cnr_config); - ia_css_get_macc_config(params, config->macc_config); - ia_css_get_ctc_config(params, config->ctc_config); - ia_css_get_aa_config(params, config->aa_config); - ia_css_get_yuv2rgb_config(params, config->yuv2rgb_cc_config); - ia_css_get_rgb2yuv_config(params, config->rgb2yuv_cc_config); - ia_css_get_csc_config(params, config->cc_config); - ia_css_get_nr_config(params, config->nr_config); - ia_css_get_gc_config(params, config->gc_config); - ia_css_get_sdis_horicoef_config(params, config->dvs_coefs); - ia_css_get_sdis_vertcoef_config(params, config->dvs_coefs); - ia_css_get_sdis_horiproj_config(params, config->dvs_coefs); - ia_css_get_sdis_vertproj_config(params, config->dvs_coefs); - ia_css_get_sdis2_horicoef_config(params, config->dvs2_coefs); - ia_css_get_sdis2_vertcoef_config(params, config->dvs2_coefs); - ia_css_get_sdis2_horiproj_config(params, config->dvs2_coefs); - ia_css_get_sdis2_vertproj_config(params, config->dvs2_coefs); - ia_css_get_r_gamma_config(params, config->r_gamma_table); - ia_css_get_g_gamma_config(params, config->g_gamma_table); - ia_css_get_b_gamma_config(params, config->b_gamma_table); - ia_css_get_xnr_table_config(params, config->xnr_table); - ia_css_get_formats_config(params, config->formats_config); - ia_css_get_xnr_config(params, config->xnr_config); - ia_css_get_xnr3_config(params, config->xnr3_config); - ia_css_get_s3a_config(params, config->s3a_config); - ia_css_get_output_config(params, config->output_config); -} - -/* Code generated by genparam/gencode.c:gen_global_access_function() */ - -void -ia_css_set_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) -{ - ia_css_set_dp_config(params, config->dp_config); - ia_css_set_wb_config(params, config->wb_config); - ia_css_set_tnr_config(params, config->tnr_config); - ia_css_set_ob_config(params, config->ob_config); - ia_css_set_de_config(params, config->de_config); - ia_css_set_anr_config(params, config->anr_config); - ia_css_set_anr2_config(params, config->anr_thres); - ia_css_set_ce_config(params, config->ce_config); - ia_css_set_ecd_config(params, config->ecd_config); - ia_css_set_ynr_config(params, config->ynr_config); - ia_css_set_fc_config(params, config->fc_config); - ia_css_set_cnr_config(params, config->cnr_config); - ia_css_set_macc_config(params, config->macc_config); - ia_css_set_ctc_config(params, config->ctc_config); - ia_css_set_aa_config(params, config->aa_config); - ia_css_set_yuv2rgb_config(params, config->yuv2rgb_cc_config); - ia_css_set_rgb2yuv_config(params, config->rgb2yuv_cc_config); - ia_css_set_csc_config(params, config->cc_config); - ia_css_set_nr_config(params, config->nr_config); - ia_css_set_gc_config(params, config->gc_config); - ia_css_set_sdis_horicoef_config(params, config->dvs_coefs); - ia_css_set_sdis_vertcoef_config(params, config->dvs_coefs); - ia_css_set_sdis_horiproj_config(params, config->dvs_coefs); - ia_css_set_sdis_vertproj_config(params, config->dvs_coefs); - ia_css_set_sdis2_horicoef_config(params, config->dvs2_coefs); - ia_css_set_sdis2_vertcoef_config(params, config->dvs2_coefs); - ia_css_set_sdis2_horiproj_config(params, config->dvs2_coefs); - ia_css_set_sdis2_vertproj_config(params, config->dvs2_coefs); - ia_css_set_r_gamma_config(params, config->r_gamma_table); - ia_css_set_g_gamma_config(params, config->g_gamma_table); - ia_css_set_b_gamma_config(params, config->b_gamma_table); - ia_css_set_xnr_table_config(params, config->xnr_table); - ia_css_set_formats_config(params, config->formats_config); - ia_css_set_xnr_config(params, config->xnr_config); - ia_css_set_xnr3_config(params, config->xnr3_config); - ia_css_set_s3a_config(params, config->s3a_config); - ia_css_set_output_config(params, config->output_config); -} diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.c b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.c deleted file mode 100644 index c54787f..0000000 --- a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.c +++ /dev/null @@ -1,223 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/* Generated code: do not edit or commmit. */ - -#include "ia_css_pipeline.h" -#include "ia_css_isp_states.h" -#include "ia_css_debug.h" -#include "assert_support.h" - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_aa_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_aa_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.aa.size; - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.aa.offset; - - if (size) - memset(&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - 0, size); - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_aa_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_cnr_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_cnr_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.cnr.offset; - - if (size) { - ia_css_init_cnr_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_cnr_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_cnr2_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_cnr2_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr2.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.cnr2.offset; - - if (size) { - ia_css_init_cnr2_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_cnr2_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_dp_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_dp_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.dp.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.dp.offset; - - if (size) { - ia_css_init_dp_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_dp_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_de_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_de_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.de.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.de.offset; - - if (size) { - ia_css_init_de_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_de_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_tnr_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_tnr_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->dmem.tnr.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->dmem.tnr.offset; - - if (size) { - ia_css_init_tnr_state((struct sh_css_isp_tnr_dmem_state *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_tnr_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_ref_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_ref_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->dmem.ref.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->dmem.ref.offset; - - if (size) { - ia_css_init_ref_state((struct sh_css_isp_ref_dmem_state *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_ref_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_ynr_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_ynr_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.ynr.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.ynr.offset; - - if (size) { - ia_css_init_ynr_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_ynr_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_state_init_table() */ - -void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])( - const struct ia_css_binary *binary) = { - ia_css_initialize_aa_state, - ia_css_initialize_cnr_state, - ia_css_initialize_cnr2_state, - ia_css_initialize_dp_state, - ia_css_initialize_de_state, - ia_css_initialize_tnr_state, - ia_css_initialize_ref_state, - ia_css_initialize_ynr_state, -}; diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/spmem_dump.c b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/spmem_dump.c deleted file mode 100644 index 9d96d52..0000000 --- a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/spmem_dump.c +++ /dev/null @@ -1,1965 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _sp_map_h_ -#define _sp_map_h_ - -#ifndef _hrt_dummy_use_blob_sp -#define _hrt_dummy_use_blob_sp() -#endif - -#define _hrt_cell_load_program_sp(proc) _hrt_cell_load_program_embedded(proc, sp) - -/* function longjmp: 6A0B */ - -/* function tmpmem_init_dmem: 671E */ - -/* function ia_css_dmaproxy_sp_set_addr_B: 3DC5 */ - -/* function ia_css_pipe_data_init_tagger_resources: AC7 */ - -/* function debug_buffer_set_ddr_addr: DD */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_mipi -#define HIVE_MEM_vbuf_mipi scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_mipi 0x7444 -#define HIVE_SIZE_vbuf_mipi 12 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_mipi scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_mipi 0x7444 -#define HIVE_SIZE_sp_vbuf_mipi 12 - -/* function ia_css_event_sp_decode: 3FB6 */ - -/* function ia_css_queue_get_size: 53C8 */ - -/* function ia_css_queue_load: 59DF */ - -/* function setjmp: 6A14 */ - -/* function ia_css_pipeline_sp_sfi_get_current_frame: 2790 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_sp2host_isys_event_queue -#define HIVE_MEM_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x57FC -#define HIVE_SIZE_sem_for_sp2host_isys_event_queue 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x57FC -#define HIVE_SIZE_sp_sem_for_sp2host_isys_event_queue 20 - -/* function ia_css_dmaproxy_sp_wait_for_ack: 6FF7 */ - -/* function ia_css_sp_rawcopy_func: 5B4A */ - -/* function ia_css_tagger_buf_sp_pop_marked: 345C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_CSI_RX_BE_SID_WIDTH -#define HIVE_MEM_N_CSI_RX_BE_SID_WIDTH scalar_processor_2400_dmem -#define HIVE_ADDR_N_CSI_RX_BE_SID_WIDTH 0x1D0 -#define HIVE_SIZE_N_CSI_RX_BE_SID_WIDTH 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_CSI_RX_BE_SID_WIDTH scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_CSI_RX_BE_SID_WIDTH 0x1D0 -#define HIVE_SIZE_sp_N_CSI_RX_BE_SID_WIDTH 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_stage -#define HIVE_MEM_isp_stage scalar_processor_2400_dmem -#define HIVE_ADDR_isp_stage 0x6D48 -#define HIVE_SIZE_isp_stage 832 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_stage scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_stage 0x6D48 -#define HIVE_SIZE_sp_isp_stage 832 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_raw -#define HIVE_MEM_vbuf_raw scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_raw 0x394 -#define HIVE_SIZE_vbuf_raw 4 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_raw scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_raw 0x394 -#define HIVE_SIZE_sp_vbuf_raw 4 - -/* function ia_css_sp_bin_copy_func: 5B2B */ - -/* function ia_css_queue_item_store: 572D */ - -/* function input_system_reset: 1201 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5BE4 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_metadata_bufs 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5BE4 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5BF8 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_buffer_bufs 160 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5BF8 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 160 - -/* function sp_start_isp: 39C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_binary_group -#define HIVE_MEM_sp_binary_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_binary_group 0x7138 -#define HIVE_SIZE_sp_binary_group 32 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_binary_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_binary_group 0x7138 -#define HIVE_SIZE_sp_sp_binary_group 32 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_sw_state -#define HIVE_MEM_sp_sw_state scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sw_state 0x73F0 -#define HIVE_SIZE_sp_sw_state 4 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_sw_state scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_sw_state 0x73F0 -#define HIVE_SIZE_sp_sp_sw_state 4 - -/* function ia_css_thread_sp_main: 136D */ - -/* function ia_css_ispctrl_sp_init_internal_buffers: 41F7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp2host_psys_event_queue_handle -#define HIVE_MEM_sp2host_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_psys_event_queue_handle 0x5C98 -#define HIVE_SIZE_sp2host_psys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_sp2host_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x5C98 -#define HIVE_SIZE_sp_sp2host_psys_event_queue_handle 12 - -/* function pixelgen_unit_test: E62 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_sp2host_psys_event_queue -#define HIVE_MEM_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x5810 -#define HIVE_SIZE_sem_for_sp2host_psys_event_queue 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x5810 -#define HIVE_SIZE_sp_sem_for_sp2host_psys_event_queue 20 - -/* function ia_css_tagger_sp_propagate_frame: 2D23 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_handles -#define HIVE_MEM_vbuf_handles scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_handles 0x7450 -#define HIVE_SIZE_vbuf_handles 960 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_handles scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_handles 0x7450 -#define HIVE_SIZE_sp_vbuf_handles 960 - -/* function ia_css_queue_store: 5893 */ - -/* function ia_css_sp_flash_register: 3691 */ - -/* function ia_css_pipeline_sp_init: 1FD7 */ - -/* function ia_css_tagger_sp_configure: 2C13 */ - -/* function ia_css_ispctrl_sp_end_binary: 3FFF */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs -#define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5CA4 -#define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5CA4 -#define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 - -/* function pixelgen_tpg_run: F18 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_event_is_pending_mask -#define HIVE_MEM_event_is_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_event_is_pending_mask 0x5C -#define HIVE_SIZE_event_is_pending_mask 44 -#else -#endif -#endif -#define HIVE_MEM_sp_event_is_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_is_pending_mask 0x5C -#define HIVE_SIZE_sp_event_is_pending_mask 44 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cb_elems_frame -#define HIVE_MEM_sp_all_cb_elems_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cb_elems_frame 0x5824 -#define HIVE_SIZE_sp_all_cb_elems_frame 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cb_elems_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x5824 -#define HIVE_SIZE_sp_sp_all_cb_elems_frame 16 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp2host_isys_event_queue_handle -#define HIVE_MEM_sp2host_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_isys_event_queue_handle 0x5CB8 -#define HIVE_SIZE_sp2host_isys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_sp2host_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x5CB8 -#define HIVE_SIZE_sp_sp2host_isys_event_queue_handle 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host_sp_com -#define HIVE_MEM_host_sp_com scalar_processor_2400_dmem -#define HIVE_ADDR_host_sp_com 0x3E6C -#define HIVE_SIZE_host_sp_com 220 -#else -#endif -#endif -#define HIVE_MEM_sp_host_sp_com scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host_sp_com 0x3E6C -#define HIVE_SIZE_sp_host_sp_com 220 - -/* function ia_css_queue_get_free_space: 54F2 */ - -/* function exec_image_pipe: 57A */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_init_dmem_data -#define HIVE_MEM_sp_init_dmem_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_init_dmem_data 0x73F4 -#define HIVE_SIZE_sp_init_dmem_data 24 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_init_dmem_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_init_dmem_data 0x73F4 -#define HIVE_SIZE_sp_sp_init_dmem_data 24 - -/* function ia_css_sp_metadata_start: 5EB3 */ - -/* function ia_css_bufq_sp_init_buffer_queues: 36E2 */ - -/* function ia_css_pipeline_sp_stop: 1FBA */ - -/* function ia_css_tagger_sp_connect_pipes: 30FD */ - -/* function sp_isys_copy_wait: 5D8 */ - -/* function is_isp_debug_buffer_full: 337 */ - -/* function ia_css_dmaproxy_sp_configure_channel_from_info: 3D35 */ - -/* function encode_and_post_timer_event: A3C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_input_system_bz2788_active -#define HIVE_MEM_input_system_bz2788_active scalar_processor_2400_dmem -#define HIVE_ADDR_input_system_bz2788_active 0x2524 -#define HIVE_SIZE_input_system_bz2788_active 4 -#else -#endif -#endif -#define HIVE_MEM_sp_input_system_bz2788_active scalar_processor_2400_dmem -#define HIVE_ADDR_sp_input_system_bz2788_active 0x2524 -#define HIVE_SIZE_sp_input_system_bz2788_active 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_IBUF_CTRL_PROCS -#define HIVE_MEM_N_IBUF_CTRL_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_N_IBUF_CTRL_PROCS 0x1FC -#define HIVE_SIZE_N_IBUF_CTRL_PROCS 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_IBUF_CTRL_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_IBUF_CTRL_PROCS 0x1FC -#define HIVE_SIZE_sp_N_IBUF_CTRL_PROCS 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_per_frame_data -#define HIVE_MEM_sp_per_frame_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_per_frame_data 0x3F48 -#define HIVE_SIZE_sp_per_frame_data 4 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_per_frame_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_per_frame_data 0x3F48 -#define HIVE_SIZE_sp_sp_per_frame_data 4 - -/* function ia_css_rmgr_sp_vbuf_dequeue: 6472 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_psys_event_queue_handle -#define HIVE_MEM_host2sp_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_psys_event_queue_handle 0x5CC4 -#define HIVE_SIZE_host2sp_psys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x5CC4 -#define HIVE_SIZE_sp_host2sp_psys_event_queue_handle 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_xmem_bin_addr -#define HIVE_MEM_xmem_bin_addr scalar_processor_2400_dmem -#define HIVE_ADDR_xmem_bin_addr 0x3F4C -#define HIVE_SIZE_xmem_bin_addr 4 -#else -#endif -#endif -#define HIVE_MEM_sp_xmem_bin_addr scalar_processor_2400_dmem -#define HIVE_ADDR_sp_xmem_bin_addr 0x3F4C -#define HIVE_SIZE_sp_xmem_bin_addr 4 - -/* function tmr_clock_init: 166F */ - -/* function ia_css_pipeline_sp_run: 1A61 */ - -/* function memcpy: 6AB4 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_ISYS2401_DMA_CHANNEL_PROCS -#define HIVE_MEM_N_ISYS2401_DMA_CHANNEL_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_N_ISYS2401_DMA_CHANNEL_PROCS 0x214 -#define HIVE_SIZE_N_ISYS2401_DMA_CHANNEL_PROCS 4 -#else -#endif -#endif -#define HIVE_MEM_sp_N_ISYS2401_DMA_CHANNEL_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_ISYS2401_DMA_CHANNEL_PROCS 0x214 -#define HIVE_SIZE_sp_N_ISYS2401_DMA_CHANNEL_PROCS 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_GP_DEVICE_BASE -#define HIVE_MEM_GP_DEVICE_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_GP_DEVICE_BASE 0x39C -#define HIVE_SIZE_GP_DEVICE_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_GP_DEVICE_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_GP_DEVICE_BASE 0x39C -#define HIVE_SIZE_sp_GP_DEVICE_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_thread_sp_ready_queue -#define HIVE_MEM_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x27C -#define HIVE_SIZE_ia_css_thread_sp_ready_queue 12 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x27C -#define HIVE_SIZE_sp_ia_css_thread_sp_ready_queue 12 - -/* function stream2mmio_send_command: E04 */ - -/* function ia_css_uds_sp_scale_params: 67BD */ - -/* function ia_css_circbuf_increase_size: 1452 */ - -/* function __divu: 6A32 */ - -/* function ia_css_thread_sp_get_state: 1295 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_cont_capt_stop -#define HIVE_MEM_sem_for_cont_capt_stop scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_cont_capt_stop 0x5834 -#define HIVE_SIZE_sem_for_cont_capt_stop 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_cont_capt_stop scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x5834 -#define HIVE_SIZE_sp_sem_for_cont_capt_stop 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_SHORT_PACKET_LUT_ENTRIES -#define HIVE_MEM_N_SHORT_PACKET_LUT_ENTRIES scalar_processor_2400_dmem -#define HIVE_ADDR_N_SHORT_PACKET_LUT_ENTRIES 0x1AC -#define HIVE_SIZE_N_SHORT_PACKET_LUT_ENTRIES 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_SHORT_PACKET_LUT_ENTRIES scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_SHORT_PACKET_LUT_ENTRIES 0x1AC -#define HIVE_SIZE_sp_N_SHORT_PACKET_LUT_ENTRIES 12 - -/* function thread_fiber_sp_main: 144B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_isp_pipe_thread -#define HIVE_MEM_sp_isp_pipe_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_pipe_thread 0x5978 -#define HIVE_SIZE_sp_isp_pipe_thread 360 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_isp_pipe_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_pipe_thread 0x5978 -#define HIVE_SIZE_sp_sp_isp_pipe_thread 360 - -/* function ia_css_parambuf_sp_handle_parameter_sets: 18B5 */ - -/* function ia_css_spctrl_sp_set_state: 5ECF */ - -/* function ia_css_thread_sem_sp_signal: 6D18 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_IRQ_BASE -#define HIVE_MEM_IRQ_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_IRQ_BASE 0x2C -#define HIVE_SIZE_IRQ_BASE 16 -#else -#endif -#endif -#define HIVE_MEM_sp_IRQ_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_IRQ_BASE 0x2C -#define HIVE_SIZE_sp_IRQ_BASE 16 - -/* function ia_css_virtual_isys_sp_isr_init: 5F70 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_TIMED_CTRL_BASE -#define HIVE_MEM_TIMED_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_TIMED_CTRL_BASE 0x40 -#define HIVE_SIZE_TIMED_CTRL_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_TIMED_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_TIMED_CTRL_BASE 0x40 -#define HIVE_SIZE_sp_TIMED_CTRL_BASE 4 - -/* function ia_css_isys_sp_generate_exp_id: 6302 */ - -/* function ia_css_rmgr_sp_init: 636D */ - -/* function ia_css_thread_sem_sp_init: 6DE7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_reading_cb_frame -#define HIVE_MEM_sem_for_reading_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_cb_frame 0x5848 -#define HIVE_SIZE_sem_for_reading_cb_frame 40 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_reading_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x5848 -#define HIVE_SIZE_sp_sem_for_reading_cb_frame 40 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_is_isp_requested -#define HIVE_MEM_is_isp_requested scalar_processor_2400_dmem -#define HIVE_ADDR_is_isp_requested 0x3A8 -#define HIVE_SIZE_is_isp_requested 4 -#else -#endif -#endif -#define HIVE_MEM_sp_is_isp_requested scalar_processor_2400_dmem -#define HIVE_ADDR_sp_is_isp_requested 0x3A8 -#define HIVE_SIZE_sp_is_isp_requested 4 - -/* function ia_css_dmaproxy_sp_execute: 3C9B */ - -/* function csi_rx_backend_rst: CE0 */ - -/* function ia_css_queue_is_empty: 7144 */ - -/* function ia_css_pipeline_sp_has_stopped: 1FB0 */ - -/* function ia_css_circbuf_extract: 1556 */ - -/* function ia_css_tagger_buf_sp_is_locked_from_start: 3572 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_current_sp_thread -#define HIVE_MEM_current_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_current_sp_thread 0x274 -#define HIVE_SIZE_current_sp_thread 4 -#else -#endif -#endif -#define HIVE_MEM_sp_current_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_current_sp_thread 0x274 -#define HIVE_SIZE_sp_current_sp_thread 4 - -/* function ia_css_spctrl_sp_get_spid: 5ED6 */ - -/* function ia_css_bufq_sp_reset_buffers: 3769 */ - -/* function ia_css_dmaproxy_sp_read_byte_addr: 7025 */ - -/* function ia_css_rmgr_sp_uninit: 6366 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_threads_stack -#define HIVE_MEM_sp_threads_stack scalar_processor_2400_dmem -#define HIVE_ADDR_sp_threads_stack 0x164 -#define HIVE_SIZE_sp_threads_stack 24 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_threads_stack scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_threads_stack 0x164 -#define HIVE_SIZE_sp_sp_threads_stack 24 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_STREAM2MMIO_SID_PROCS -#define HIVE_MEM_N_STREAM2MMIO_SID_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_N_STREAM2MMIO_SID_PROCS 0x218 -#define HIVE_SIZE_N_STREAM2MMIO_SID_PROCS 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_STREAM2MMIO_SID_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_STREAM2MMIO_SID_PROCS 0x218 -#define HIVE_SIZE_sp_N_STREAM2MMIO_SID_PROCS 12 - -/* function ia_css_circbuf_peek: 1538 */ - -/* function ia_css_parambuf_sp_wait_for_in_param: 167E */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cb_elems_param -#define HIVE_MEM_sp_all_cb_elems_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cb_elems_param 0x5870 -#define HIVE_SIZE_sp_all_cb_elems_param 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cb_elems_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cb_elems_param 0x5870 -#define HIVE_SIZE_sp_sp_all_cb_elems_param 16 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_pipeline_sp_curr_binary_id -#define HIVE_MEM_pipeline_sp_curr_binary_id scalar_processor_2400_dmem -#define HIVE_ADDR_pipeline_sp_curr_binary_id 0x288 -#define HIVE_SIZE_pipeline_sp_curr_binary_id 4 -#else -#endif -#endif -#define HIVE_MEM_sp_pipeline_sp_curr_binary_id scalar_processor_2400_dmem -#define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x288 -#define HIVE_SIZE_sp_pipeline_sp_curr_binary_id 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_frame_desc -#define HIVE_MEM_sp_all_cbs_frame_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_frame_desc 0x5880 -#define HIVE_SIZE_sp_all_cbs_frame_desc 8 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_frame_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x5880 -#define HIVE_SIZE_sp_sp_all_cbs_frame_desc 8 - -/* function sp_isys_copy_func_v2: 5BD */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_reading_cb_param -#define HIVE_MEM_sem_for_reading_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_cb_param 0x5888 -#define HIVE_SIZE_sem_for_reading_cb_param 40 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_reading_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_cb_param 0x5888 -#define HIVE_SIZE_sp_sem_for_reading_cb_param 40 - -/* function ia_css_queue_get_used_space: 54A6 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_cont_capt_start -#define HIVE_MEM_sem_for_cont_capt_start scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_cont_capt_start 0x58B0 -#define HIVE_SIZE_sem_for_cont_capt_start 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_cont_capt_start scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_cont_capt_start 0x58B0 -#define HIVE_SIZE_sp_sem_for_cont_capt_start 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_tmp_heap -#define HIVE_MEM_tmp_heap scalar_processor_2400_dmem -#define HIVE_ADDR_tmp_heap 0x7158 -#define HIVE_SIZE_tmp_heap 640 -#else -#endif -#endif -#define HIVE_MEM_sp_tmp_heap scalar_processor_2400_dmem -#define HIVE_ADDR_sp_tmp_heap 0x7158 -#define HIVE_SIZE_sp_tmp_heap 640 - -/* function ia_css_rmgr_sp_get_num_vbuf: 6676 */ - -/* function ia_css_ispctrl_sp_output_compute_dma_info: 4A27 */ - -/* function ia_css_tagger_sp_lock_exp_id: 29E0 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5CD0 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_s3a_bufs 60 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5CD0 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 60 - -/* function ia_css_queue_is_full: 553D */ - -/* function debug_buffer_init_isp: E4 */ - -/* function ia_css_tagger_sp_exp_id_is_locked: 2916 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem -#define HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x7810 -#define HIVE_SIZE_ia_css_rmgr_sp_mipi_frame_sem 60 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x7810 -#define HIVE_SIZE_sp_ia_css_rmgr_sp_mipi_frame_sem 60 - -/* function ia_css_rmgr_sp_refcount_dump: 644D */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5D0C -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5D0C -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_pipe_threads -#define HIVE_MEM_sp_pipe_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_pipe_threads 0x150 -#define HIVE_SIZE_sp_pipe_threads 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_pipe_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_pipe_threads 0x150 -#define HIVE_SIZE_sp_sp_pipe_threads 20 - -/* function sp_event_proxy_func: 721 */ - -/* function ibuf_ctrl_run: D79 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_isys_event_queue_handle -#define HIVE_MEM_host2sp_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_isys_event_queue_handle 0x5D20 -#define HIVE_SIZE_host2sp_isys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x5D20 -#define HIVE_SIZE_sp_host2sp_isys_event_queue_handle 12 - -/* function ia_css_thread_sp_yield: 6C96 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_param_desc -#define HIVE_MEM_sp_all_cbs_param_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_param_desc 0x58C4 -#define HIVE_SIZE_sp_all_cbs_param_desc 8 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_param_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x58C4 -#define HIVE_SIZE_sp_sp_all_cbs_param_desc 8 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb -#define HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x6D38 -#define HIVE_SIZE_ia_css_dmaproxy_sp_invalidate_tlb 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x6D38 -#define HIVE_SIZE_sp_ia_css_dmaproxy_sp_invalidate_tlb 4 - -/* function ia_css_thread_sp_fork: 1322 */ - -/* function ia_css_tagger_sp_destroy: 3107 */ - -/* function ia_css_dmaproxy_sp_vmem_read: 3C3B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_LONG_PACKET_LUT_ENTRIES -#define HIVE_MEM_N_LONG_PACKET_LUT_ENTRIES scalar_processor_2400_dmem -#define HIVE_ADDR_N_LONG_PACKET_LUT_ENTRIES 0x1B8 -#define HIVE_SIZE_N_LONG_PACKET_LUT_ENTRIES 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_LONG_PACKET_LUT_ENTRIES scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_LONG_PACKET_LUT_ENTRIES 0x1B8 -#define HIVE_SIZE_sp_N_LONG_PACKET_LUT_ENTRIES 12 - -/* function initialize_sp_group: 58A */ - -/* function ia_css_tagger_buf_sp_peek: 337E */ - -/* function ia_css_thread_sp_init: 134E */ - -/* function qos_scheduler_update_fps: 67AD */ - -/* function ia_css_isys_sp_reset_exp_id: 62F9 */ - -/* function ia_css_ispctrl_sp_set_stream_base_addr: 5114 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_DMEM_BASE -#define HIVE_MEM_ISP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_DMEM_BASE 0x10 -#define HIVE_SIZE_ISP_DMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_DMEM_BASE 0x10 -#define HIVE_SIZE_sp_ISP_DMEM_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_SP_DMEM_BASE -#define HIVE_MEM_SP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_SP_DMEM_BASE 0x4 -#define HIVE_SIZE_SP_DMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_SP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_SP_DMEM_BASE 0x4 -#define HIVE_SIZE_sp_SP_DMEM_BASE 4 - -/* function ibuf_ctrl_transfer: D61 */ - -/* function __ia_css_queue_is_empty_text: 5403 */ - -/* function ia_css_dmaproxy_sp_read: 3CB1 */ - -/* function virtual_isys_stream_is_capture_done: 5F94 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_raw_copy_line_count -#define HIVE_MEM_raw_copy_line_count scalar_processor_2400_dmem -#define HIVE_ADDR_raw_copy_line_count 0x378 -#define HIVE_SIZE_raw_copy_line_count 4 -#else -#endif -#endif -#define HIVE_MEM_sp_raw_copy_line_count scalar_processor_2400_dmem -#define HIVE_ADDR_sp_raw_copy_line_count 0x378 -#define HIVE_SIZE_sp_raw_copy_line_count 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_tag_cmd_queue_handle -#define HIVE_MEM_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x5D2C -#define HIVE_SIZE_host2sp_tag_cmd_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x5D2C -#define HIVE_SIZE_sp_host2sp_tag_cmd_queue_handle 12 - -/* function ia_css_queue_peek: 541C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_frame_cnt -#define HIVE_MEM_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x5BD8 -#define HIVE_SIZE_ia_css_flash_sp_frame_cnt 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x5BD8 -#define HIVE_SIZE_sp_ia_css_flash_sp_frame_cnt 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_event_can_send_token_mask -#define HIVE_MEM_event_can_send_token_mask scalar_processor_2400_dmem -#define HIVE_ADDR_event_can_send_token_mask 0x88 -#define HIVE_SIZE_event_can_send_token_mask 44 -#else -#endif -#endif -#define HIVE_MEM_sp_event_can_send_token_mask scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_can_send_token_mask 0x88 -#define HIVE_SIZE_sp_event_can_send_token_mask 44 - -/* function csi_rx_frontend_stop: C0B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_thread -#define HIVE_MEM_isp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_isp_thread 0x7088 -#define HIVE_SIZE_isp_thread 4 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_thread 0x7088 -#define HIVE_SIZE_sp_isp_thread 4 - -/* function encode_and_post_sp_event_non_blocking: A84 */ - -/* function is_ddr_debug_buffer_full: 2CC */ - -/* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 33CE */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_threads_fiber -#define HIVE_MEM_sp_threads_fiber scalar_processor_2400_dmem -#define HIVE_ADDR_sp_threads_fiber 0x194 -#define HIVE_SIZE_sp_threads_fiber 24 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_threads_fiber scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_threads_fiber 0x194 -#define HIVE_SIZE_sp_sp_threads_fiber 24 - -/* function encode_and_post_sp_event: A0D */ - -/* function debug_enqueue_ddr: EE */ - -/* function ia_css_rmgr_sp_refcount_init_vbuf: 6408 */ - -/* function dmaproxy_sp_read_write: 70C3 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer -#define HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6D3C -#define HIVE_SIZE_ia_css_dmaproxy_isp_dma_cmd_buffer 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6D3C -#define HIVE_SIZE_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_buffer_queue_handle -#define HIVE_MEM_host2sp_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_buffer_queue_handle 0x5D38 -#define HIVE_SIZE_host2sp_buffer_queue_handle 480 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x5D38 -#define HIVE_SIZE_sp_host2sp_buffer_queue_handle 480 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_in_service -#define HIVE_MEM_ia_css_flash_sp_in_service scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_in_service 0x3074 -#define HIVE_SIZE_ia_css_flash_sp_in_service 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_in_service scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3074 -#define HIVE_SIZE_sp_ia_css_flash_sp_in_service 4 - -/* function ia_css_dmaproxy_sp_process: 6E0F */ - -/* function ia_css_tagger_buf_sp_mark_from_end: 3656 */ - -/* function ia_css_ispctrl_sp_init_cs: 40FA */ - -/* function ia_css_spctrl_sp_init: 5EE4 */ - -/* function sp_event_proxy_init: 736 */ - -/* function input_system_input_port_close: 1095 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5F18 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5F18 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_output -#define HIVE_MEM_sp_output scalar_processor_2400_dmem -#define HIVE_ADDR_sp_output 0x3F50 -#define HIVE_SIZE_sp_output 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_output scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_output 0x3F50 -#define HIVE_SIZE_sp_sp_output 16 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues -#define HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5F40 -#define HIVE_SIZE_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5F40 -#define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 - -/* function pixelgen_prbs_config: E8D */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_CTRL_BASE -#define HIVE_MEM_ISP_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_CTRL_BASE 0x8 -#define HIVE_SIZE_ISP_CTRL_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_CTRL_BASE 0x8 -#define HIVE_SIZE_sp_ISP_CTRL_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_INPUT_FORMATTER_BASE -#define HIVE_MEM_INPUT_FORMATTER_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_INPUT_FORMATTER_BASE 0x4C -#define HIVE_SIZE_INPUT_FORMATTER_BASE 16 -#else -#endif -#endif -#define HIVE_MEM_sp_INPUT_FORMATTER_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_INPUT_FORMATTER_BASE 0x4C -#define HIVE_SIZE_sp_INPUT_FORMATTER_BASE 16 - -/* function sp_dma_proxy_reset_channels: 3F20 */ - -/* function ia_css_tagger_sp_update_size: 334D */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_host_sp_queue -#define HIVE_MEM_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x6260 -#define HIVE_SIZE_ia_css_bufq_host_sp_queue 2008 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x6260 -#define HIVE_SIZE_sp_ia_css_bufq_host_sp_queue 2008 - -/* function thread_fiber_sp_create: 13BA */ - -/* function ia_css_dmaproxy_sp_set_increments: 3DB2 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_writing_cb_frame -#define HIVE_MEM_sem_for_writing_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_writing_cb_frame 0x58CC -#define HIVE_SIZE_sem_for_writing_cb_frame 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_writing_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x58CC -#define HIVE_SIZE_sp_sem_for_writing_cb_frame 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_writing_cb_param -#define HIVE_MEM_sem_for_writing_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_writing_cb_param 0x58E0 -#define HIVE_SIZE_sem_for_writing_cb_param 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_writing_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_writing_cb_param 0x58E0 -#define HIVE_SIZE_sp_sem_for_writing_cb_param 20 - -/* function pixelgen_tpg_is_done: F07 */ - -/* function ia_css_isys_stream_capture_indication: 60D7 */ - -/* function sp_start_isp_entry: 392 */ -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifdef HIVE_ADDR_sp_start_isp_entry -#endif -#define HIVE_ADDR_sp_start_isp_entry 0x392 -#endif -#define HIVE_ADDR_sp_sp_start_isp_entry 0x392 - -/* function ia_css_tagger_buf_sp_unmark_all: 35DA */ - -/* function ia_css_tagger_buf_sp_unmark_from_start: 361B */ - -/* function ia_css_dmaproxy_sp_channel_acquire: 3F4C */ - -/* function ia_css_rmgr_sp_add_num_vbuf: 6652 */ - -/* function ibuf_ctrl_config: D85 */ - -/* function ia_css_isys_stream_stop: 61F4 */ - -/* function __ia_css_dmaproxy_sp_wait_for_ack_text: 3C07 */ - -/* function ia_css_tagger_sp_acquire_buf_elem: 28EE */ - -/* function ia_css_bufq_sp_is_dynamic_buffer: 3AB3 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_group -#define HIVE_MEM_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_group 0x3F60 -#define HIVE_SIZE_sp_group 6296 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_group 0x3F60 -#define HIVE_SIZE_sp_sp_group 6296 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_event_proxy_thread -#define HIVE_MEM_sp_event_proxy_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_proxy_thread 0x5AE0 -#define HIVE_SIZE_sp_event_proxy_thread 72 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_event_proxy_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_event_proxy_thread 0x5AE0 -#define HIVE_SIZE_sp_sp_event_proxy_thread 72 - -/* function ia_css_thread_sp_kill: 12E8 */ - -/* function ia_css_tagger_sp_create: 32FB */ - -/* function tmpmem_acquire_dmem: 66FF */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_MMU_BASE -#define HIVE_MEM_MMU_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_MMU_BASE 0x24 -#define HIVE_SIZE_MMU_BASE 8 -#else -#endif -#endif -#define HIVE_MEM_sp_MMU_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_MMU_BASE 0x24 -#define HIVE_SIZE_sp_MMU_BASE 8 - -/* function ia_css_dmaproxy_sp_channel_release: 3F38 */ - -/* function pixelgen_prbs_run: E7B */ - -/* function ia_css_dmaproxy_sp_is_idle: 3F18 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_qos_start -#define HIVE_MEM_sem_for_qos_start scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_qos_start 0x58F4 -#define HIVE_SIZE_sem_for_qos_start 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_qos_start scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_qos_start 0x58F4 -#define HIVE_SIZE_sp_sem_for_qos_start 20 - -/* function isp_hmem_load: B5D */ - -/* function ia_css_tagger_sp_release_buf_elem: 28CA */ - -/* function ia_css_eventq_sp_send: 3F8E */ - -/* function ia_css_tagger_buf_sp_unlock_from_start: 350A */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_debug_buffer_ddr_address -#define HIVE_MEM_debug_buffer_ddr_address scalar_processor_2400_dmem -#define HIVE_ADDR_debug_buffer_ddr_address 0xBC -#define HIVE_SIZE_debug_buffer_ddr_address 4 -#else -#endif -#endif -#define HIVE_MEM_sp_debug_buffer_ddr_address scalar_processor_2400_dmem -#define HIVE_ADDR_sp_debug_buffer_ddr_address 0xBC -#define HIVE_SIZE_sp_debug_buffer_ddr_address 4 - -/* function sp_isys_copy_request: 681 */ - -/* function ia_css_rmgr_sp_refcount_retain_vbuf: 64E2 */ - -/* function ia_css_thread_sp_set_priority: 12E0 */ - -/* function sizeof_hmem: C04 */ - -/* function input_system_channel_open: 11BC */ - -/* function pixelgen_tpg_stop: EF5 */ - -/* function tmpmem_release_dmem: 66EE */ - -/* function __ia_css_dmaproxy_sp_process_text: 3BAB */ - -/* function ia_css_dmaproxy_sp_set_width_exception: 3D9D */ - -/* function sp_event_assert: 8BD */ - -/* function ia_css_flash_sp_init_internal_params: 36D7 */ - -/* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 3410 */ - -/* function __modu: 6A78 */ - -/* function ia_css_dmaproxy_sp_init_isp_vector: 3C0D */ - -/* function input_system_channel_transfer: 11A5 */ - -/* function isp_vamem_store: 0 */ - -/* function ia_css_tagger_sp_set_copy_pipe: 32F2 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_GDC_BASE -#define HIVE_MEM_GDC_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_GDC_BASE 0x44 -#define HIVE_SIZE_GDC_BASE 8 -#else -#endif -#endif -#define HIVE_MEM_sp_GDC_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_GDC_BASE 0x44 -#define HIVE_SIZE_sp_GDC_BASE 8 - -/* function ia_css_queue_local_init: 5707 */ - -/* function sp_event_proxy_callout_func: 6B45 */ - -/* function qos_scheduler_schedule_stage: 6759 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_thread_sp_num_ready_threads -#define HIVE_MEM_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x5B28 -#define HIVE_SIZE_ia_css_thread_sp_num_ready_threads 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x5B28 -#define HIVE_SIZE_sp_ia_css_thread_sp_num_ready_threads 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_threads_stack_size -#define HIVE_MEM_sp_threads_stack_size scalar_processor_2400_dmem -#define HIVE_ADDR_sp_threads_stack_size 0x17C -#define HIVE_SIZE_sp_threads_stack_size 24 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_threads_stack_size scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_threads_stack_size 0x17C -#define HIVE_SIZE_sp_sp_threads_stack_size 24 - -/* function ia_css_ispctrl_sp_isp_done_row_striping: 4A0D */ - -/* function __ia_css_virtual_isys_sp_isr_text: 5F4E */ - -/* function ia_css_queue_dequeue: 5585 */ - -/* function is_qos_standalone_mode: 6734 */ - -/* function ia_css_dmaproxy_sp_configure_channel: 703C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_current_thread_fiber_sp -#define HIVE_MEM_current_thread_fiber_sp scalar_processor_2400_dmem -#define HIVE_ADDR_current_thread_fiber_sp 0x5B2C -#define HIVE_SIZE_current_thread_fiber_sp 4 -#else -#endif -#endif -#define HIVE_MEM_sp_current_thread_fiber_sp scalar_processor_2400_dmem -#define HIVE_ADDR_sp_current_thread_fiber_sp 0x5B2C -#define HIVE_SIZE_sp_current_thread_fiber_sp 4 - -/* function ia_css_circbuf_pop: 15EA */ - -/* function memset: 6AF7 */ - -/* function irq_raise_set_token: B6 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_GPIO_BASE -#define HIVE_MEM_GPIO_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_GPIO_BASE 0x3C -#define HIVE_SIZE_GPIO_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_GPIO_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_GPIO_BASE 0x3C -#define HIVE_SIZE_sp_GPIO_BASE 4 - -/* function pixelgen_prbs_stop: E69 */ - -/* function ia_css_pipeline_acc_stage_enable: 1F69 */ - -/* function ia_css_tagger_sp_unlock_exp_id: 293B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_ph -#define HIVE_MEM_isp_ph scalar_processor_2400_dmem -#define HIVE_ADDR_isp_ph 0x740C -#define HIVE_SIZE_isp_ph 28 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_ph scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_ph 0x740C -#define HIVE_SIZE_sp_isp_ph 28 - -/* function ia_css_ispctrl_sp_init_ds: 4286 */ - -/* function get_xmem_base_addr_raw: 4635 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_param -#define HIVE_MEM_sp_all_cbs_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_param 0x5908 -#define HIVE_SIZE_sp_all_cbs_param 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_param 0x5908 -#define HIVE_SIZE_sp_sp_all_cbs_param 16 - -/* function pixelgen_tpg_config: F2A */ - -/* function ia_css_circbuf_create: 1638 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_sp_group -#define HIVE_MEM_sem_for_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp_group 0x5918 -#define HIVE_SIZE_sem_for_sp_group 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp_group 0x5918 -#define HIVE_SIZE_sp_sem_for_sp_group 20 - -/* function csi_rx_frontend_run: C1C */ - -/* function __ia_css_dmaproxy_sp_configure_channel_text: 3D7C */ - -/* function ia_css_framebuf_sp_wait_for_in_frame: 667D */ - -/* function ia_css_isys_stream_open: 62A9 */ - -/* function ia_css_sp_rawcopy_tag_frame: 5E35 */ - -/* function input_system_channel_configure: 11D8 */ - -/* function isp_hmem_clear: B2D */ - -/* function ia_css_framebuf_sp_release_in_frame: 66C0 */ - -/* function stream2mmio_config: E15 */ - -/* function ia_css_ispctrl_sp_start_binary: 40D8 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs -#define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x6A38 -#define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x6A38 -#define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 - -/* function ia_css_eventq_sp_recv: 3F60 */ - -/* function csi_rx_frontend_config: C74 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_pool -#define HIVE_MEM_isp_pool scalar_processor_2400_dmem -#define HIVE_ADDR_isp_pool 0x388 -#define HIVE_SIZE_isp_pool 4 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_pool scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_pool 0x388 -#define HIVE_SIZE_sp_isp_pool 4 - -/* function ia_css_rmgr_sp_rel_gen: 63AF */ - -/* function ia_css_tagger_sp_unblock_clients: 31C3 */ - -/* function css_get_frame_processing_time_end: 28BA */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_event_any_pending_mask -#define HIVE_MEM_event_any_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_event_any_pending_mask 0x3A0 -#define HIVE_SIZE_event_any_pending_mask 8 -#else -#endif -#endif -#define HIVE_MEM_sp_event_any_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_any_pending_mask 0x3A0 -#define HIVE_SIZE_sp_event_any_pending_mask 8 - -/* function ia_css_pipeline_sp_get_pipe_io_status: 1A5A */ - -/* function sh_css_decode_tag_descr: 352 */ - -/* function debug_enqueue_isp: 27B */ - -/* function qos_scheduler_update_stage_budget: 673C */ - -/* function ia_css_spctrl_sp_uninit: 5EDD */ - -/* function csi_rx_backend_run: C62 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x6A4C -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_dis_bufs 140 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x6A4C -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_dis_bufs 140 - -/* function ia_css_tagger_buf_sp_lock_from_start: 353E */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_isp_idle -#define HIVE_MEM_sem_for_isp_idle scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_isp_idle 0x592C -#define HIVE_SIZE_sem_for_isp_idle 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_isp_idle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_isp_idle 0x592C -#define HIVE_SIZE_sp_sem_for_isp_idle 20 - -/* function ia_css_dmaproxy_sp_write_byte_addr: 3C6A */ - -/* function ia_css_dmaproxy_sp_init: 3BE1 */ - -/* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 37A9 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_VAMEM_BASE -#define HIVE_MEM_ISP_VAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_VAMEM_BASE 0x14 -#define HIVE_SIZE_ISP_VAMEM_BASE 12 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_VAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_VAMEM_BASE 0x14 -#define HIVE_SIZE_sp_ISP_VAMEM_BASE 12 - -/* function input_system_channel_sync: 6C10 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_rawcopy_sp_tagger -#define HIVE_MEM_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x73D8 -#define HIVE_SIZE_ia_css_rawcopy_sp_tagger 24 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x73D8 -#define HIVE_SIZE_sp_ia_css_rawcopy_sp_tagger 24 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x6AD8 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_exp_ids 70 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x6AD8 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_exp_ids 70 - -/* function ia_css_queue_item_load: 57F9 */ - -/* function ia_css_spctrl_sp_get_state: 5EC8 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_callout_sp_thread -#define HIVE_MEM_callout_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_callout_sp_thread 0x278 -#define HIVE_SIZE_callout_sp_thread 4 -#else -#endif -#endif -#define HIVE_MEM_sp_callout_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_callout_sp_thread 0x278 -#define HIVE_SIZE_sp_callout_sp_thread 4 - -/* function thread_fiber_sp_init: 1441 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_SP_PMEM_BASE -#define HIVE_MEM_SP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_SP_PMEM_BASE 0x0 -#define HIVE_SIZE_SP_PMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_SP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_SP_PMEM_BASE 0x0 -#define HIVE_SIZE_sp_SP_PMEM_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_isp_input_stream_format -#define HIVE_MEM_sp_isp_input_stream_format scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_input_stream_format 0x3E50 -#define HIVE_SIZE_sp_isp_input_stream_format 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_isp_input_stream_format scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_input_stream_format 0x3E50 -#define HIVE_SIZE_sp_sp_isp_input_stream_format 20 - -/* function __mod: 6A64 */ - -/* function ia_css_dmaproxy_sp_init_dmem_channel: 3CCB */ - -/* function ia_css_thread_sp_join: 1311 */ - -/* function ia_css_dmaproxy_sp_add_command: 712E */ - -/* function ia_css_sp_metadata_thread_func: 5EC1 */ - -/* function __sp_event_proxy_func_critical: 6B32 */ - -/* function ia_css_pipeline_sp_wait_for_isys_stream_N: 6074 */ - -/* function ia_css_sp_metadata_wait: 5EBA */ - -/* function ia_css_circbuf_peek_from_start: 151A */ - -/* function ia_css_event_sp_encode: 3FEB */ - -/* function ia_css_thread_sp_run: 1384 */ - -/* function sp_isys_copy_func: 5AC */ - -/* function ia_css_sp_isp_param_init_isp_memories: 52AC */ - -/* function register_isr: 8B5 */ - -/* function irq_raise: C8 */ - -/* function ia_css_dmaproxy_sp_mmu_invalidate: 3B71 */ - -/* function csi_rx_backend_disable: C2E */ - -/* function pipeline_sp_initialize_stage: 20BF */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_CSI_RX_FE_CTRL_DLANES -#define HIVE_MEM_N_CSI_RX_FE_CTRL_DLANES scalar_processor_2400_dmem -#define HIVE_ADDR_N_CSI_RX_FE_CTRL_DLANES 0x1C4 -#define HIVE_SIZE_N_CSI_RX_FE_CTRL_DLANES 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_CSI_RX_FE_CTRL_DLANES scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_CSI_RX_FE_CTRL_DLANES 0x1C4 -#define HIVE_SIZE_sp_N_CSI_RX_FE_CTRL_DLANES 12 - -/* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 700E */ - -/* function ia_css_ispctrl_sp_done_ds: 426D */ - -/* function csi_rx_backend_config: C85 */ - -/* function ia_css_sp_isp_param_get_mem_inits: 5287 */ - -/* function ia_css_parambuf_sp_init_buffer_queues: 1A27 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_pfp_spref -#define HIVE_MEM_vbuf_pfp_spref scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_pfp_spref 0x390 -#define HIVE_SIZE_vbuf_pfp_spref 4 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_pfp_spref scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_pfp_spref 0x390 -#define HIVE_SIZE_sp_vbuf_pfp_spref 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_HMEM_BASE -#define HIVE_MEM_ISP_HMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_HMEM_BASE 0x20 -#define HIVE_SIZE_ISP_HMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_HMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_HMEM_BASE 0x20 -#define HIVE_SIZE_sp_ISP_HMEM_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_frames -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x6B20 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_frames 280 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x6B20 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_frames 280 - -/* function qos_scheduler_init_stage_budget: 679A */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp2host_buffer_queue_handle -#define HIVE_MEM_sp2host_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_buffer_queue_handle 0x6C38 -#define HIVE_SIZE_sp2host_buffer_queue_handle 96 -#else -#endif -#endif -#define HIVE_MEM_sp_sp2host_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x6C38 -#define HIVE_SIZE_sp_sp2host_buffer_queue_handle 96 - -/* function ia_css_ispctrl_sp_init_isp_vars: 4F79 */ - -/* function ia_css_isys_stream_start: 6187 */ - -/* function sp_warning: 8E8 */ - -/* function ia_css_rmgr_sp_vbuf_enqueue: 64A2 */ - -/* function ia_css_tagger_sp_tag_exp_id: 2A55 */ - -/* function ia_css_pipeline_sp_sfi_release_current_frame: 273C */ - -/* function ia_css_dmaproxy_sp_write: 3C81 */ - -/* function ia_css_isys_stream_start_async: 6250 */ - -/* function ia_css_parambuf_sp_release_in_param: 187B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_irq_sw_interrupt_token -#define HIVE_MEM_irq_sw_interrupt_token scalar_processor_2400_dmem -#define HIVE_ADDR_irq_sw_interrupt_token 0x3E4C -#define HIVE_SIZE_irq_sw_interrupt_token 4 -#else -#endif -#endif -#define HIVE_MEM_sp_irq_sw_interrupt_token scalar_processor_2400_dmem -#define HIVE_ADDR_sp_irq_sw_interrupt_token 0x3E4C -#define HIVE_SIZE_sp_irq_sw_interrupt_token 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_isp_addresses -#define HIVE_MEM_sp_isp_addresses scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_addresses 0x708C -#define HIVE_SIZE_sp_isp_addresses 172 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_isp_addresses scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_addresses 0x708C -#define HIVE_SIZE_sp_sp_isp_addresses 172 - -/* function ia_css_rmgr_sp_acq_gen: 63C7 */ - -/* function input_system_input_port_open: 10E7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isps -#define HIVE_MEM_isps scalar_processor_2400_dmem -#define HIVE_ADDR_isps 0x7428 -#define HIVE_SIZE_isps 28 -#else -#endif -#endif -#define HIVE_MEM_sp_isps scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isps 0x7428 -#define HIVE_SIZE_sp_isps 28 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host_sp_queues_initialized -#define HIVE_MEM_host_sp_queues_initialized scalar_processor_2400_dmem -#define HIVE_ADDR_host_sp_queues_initialized 0x3E64 -#define HIVE_SIZE_host_sp_queues_initialized 4 -#else -#endif -#endif -#define HIVE_MEM_sp_host_sp_queues_initialized scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host_sp_queues_initialized 0x3E64 -#define HIVE_SIZE_sp_host_sp_queues_initialized 4 - -/* function ia_css_queue_uninit: 56C5 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_ispctrl_sp_isp_started -#define HIVE_MEM_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x6D40 -#define HIVE_SIZE_ia_css_ispctrl_sp_isp_started 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x6D40 -#define HIVE_SIZE_sp_ia_css_ispctrl_sp_isp_started 4 - -/* function ia_css_bufq_sp_release_dynamic_buf: 3815 */ - -/* function ia_css_dmaproxy_sp_set_height_exception: 3D8E */ - -/* function ia_css_dmaproxy_sp_init_vmem_channel: 3CFF */ - -/* function csi_rx_backend_stop: C51 */ - -/* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 3C53 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_spref -#define HIVE_MEM_vbuf_spref scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_spref 0x38C -#define HIVE_SIZE_vbuf_spref 4 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_spref scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_spref 0x38C -#define HIVE_SIZE_sp_vbuf_spref 4 - -/* function ia_css_queue_enqueue: 560F */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_request -#define HIVE_MEM_ia_css_flash_sp_request scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_request 0x5BDC -#define HIVE_SIZE_ia_css_flash_sp_request 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_request scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_request 0x5BDC -#define HIVE_SIZE_sp_ia_css_flash_sp_request 4 - -/* function ia_css_dmaproxy_sp_vmem_write: 3C24 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_tagger_frames -#define HIVE_MEM_tagger_frames scalar_processor_2400_dmem -#define HIVE_ADDR_tagger_frames 0x5B30 -#define HIVE_SIZE_tagger_frames 168 -#else -#endif -#endif -#define HIVE_MEM_sp_tagger_frames scalar_processor_2400_dmem -#define HIVE_ADDR_sp_tagger_frames 0x5B30 -#define HIVE_SIZE_sp_tagger_frames 168 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_reading_if -#define HIVE_MEM_sem_for_reading_if scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_if 0x5940 -#define HIVE_SIZE_sem_for_reading_if 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_reading_if scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_if 0x5940 -#define HIVE_SIZE_sp_sem_for_reading_if 20 - -/* function sp_generate_interrupts: 967 */ - -/* function ia_css_pipeline_sp_start: 1FC2 */ - -/* function ia_css_thread_default_callout: 6C8F */ - -/* function csi_rx_backend_enable: C3F */ - -/* function ia_css_sp_rawcopy_init: 5B32 */ - -/* function input_system_input_port_configure: 1139 */ - -/* function tmr_clock_read: 1665 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_BAMEM_BASE -#define HIVE_MEM_ISP_BAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_BAMEM_BASE 0x398 -#define HIVE_SIZE_ISP_BAMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_BAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x398 -#define HIVE_SIZE_sp_ISP_BAMEM_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues -#define HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6C98 -#define HIVE_SIZE_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6C98 -#define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 - -/* function isys2401_dma_config_legacy: DDA */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ibuf_ctrl_master_ports -#define HIVE_MEM_ibuf_ctrl_master_ports scalar_processor_2400_dmem -#define HIVE_ADDR_ibuf_ctrl_master_ports 0x208 -#define HIVE_SIZE_ibuf_ctrl_master_ports 12 -#else -#endif -#endif -#define HIVE_MEM_sp_ibuf_ctrl_master_ports scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ibuf_ctrl_master_ports 0x208 -#define HIVE_SIZE_sp_ibuf_ctrl_master_ports 12 - -/* function css_get_frame_processing_time_start: 28C2 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_frame -#define HIVE_MEM_sp_all_cbs_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_frame 0x5954 -#define HIVE_SIZE_sp_all_cbs_frame 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_frame 0x5954 -#define HIVE_SIZE_sp_sp_all_cbs_frame 16 - -/* function ia_css_virtual_isys_sp_isr: 716E */ - -/* function thread_sp_queue_print: 13A1 */ - -/* function sp_notify_eof: 913 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_str2mem -#define HIVE_MEM_sem_for_str2mem scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_str2mem 0x5964 -#define HIVE_SIZE_sem_for_str2mem 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_str2mem scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_str2mem 0x5964 -#define HIVE_SIZE_sp_sem_for_str2mem 20 - -/* function ia_css_tagger_buf_sp_is_marked_from_start: 35A6 */ - -/* function ia_css_bufq_sp_acquire_dynamic_buf: 39CD */ - -/* function ia_css_pipeline_sp_sfi_mode_is_enabled: 2890 */ - -/* function ia_css_circbuf_destroy: 162F */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_PMEM_BASE -#define HIVE_MEM_ISP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_PMEM_BASE 0xC -#define HIVE_SIZE_ISP_PMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_PMEM_BASE 0xC -#define HIVE_SIZE_sp_ISP_PMEM_BASE 4 - -/* function ia_css_sp_isp_param_mem_load: 521A */ - -/* function ia_css_tagger_buf_sp_pop_from_start: 3392 */ - -/* function __div: 6A1C */ - -/* function ia_css_rmgr_sp_refcount_release_vbuf: 64C1 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_in_use -#define HIVE_MEM_ia_css_flash_sp_in_use scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_in_use 0x5BE0 -#define HIVE_SIZE_ia_css_flash_sp_in_use 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_in_use scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x5BE0 -#define HIVE_SIZE_sp_ia_css_flash_sp_in_use 4 - -/* function ia_css_thread_sem_sp_wait: 6D63 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_sleep_mode -#define HIVE_MEM_sp_sleep_mode scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sleep_mode 0x3E68 -#define HIVE_SIZE_sp_sleep_mode 4 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_sleep_mode scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_sleep_mode 0x3E68 -#define HIVE_SIZE_sp_sp_sleep_mode 4 - -/* function ia_css_tagger_buf_sp_push: 34A1 */ - -/* function mmu_invalidate_cache: D3 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_max_cb_elems -#define HIVE_MEM_sp_max_cb_elems scalar_processor_2400_dmem -#define HIVE_ADDR_sp_max_cb_elems 0x148 -#define HIVE_SIZE_sp_max_cb_elems 8 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_max_cb_elems scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_max_cb_elems 0x148 -#define HIVE_SIZE_sp_sp_max_cb_elems 8 - -/* function ia_css_queue_remote_init: 56E7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_stop_req -#define HIVE_MEM_isp_stop_req scalar_processor_2400_dmem -#define HIVE_ADDR_isp_stop_req 0x57F8 -#define HIVE_SIZE_isp_stop_req 4 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_stop_req scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_stop_req 0x57F8 -#define HIVE_SIZE_sp_isp_stop_req 4 - -/* function ia_css_pipeline_sp_sfi_request_next_frame: 2752 */ - - -#endif /* _sp_map_h_ */ diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/csi_rx_global.h b/drivers/staging/media/atomisp/pci/css_2401_system/csi_rx_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/csi_rx_global.h rename to drivers/staging/media/atomisp/pci/css_2401_system/csi_rx_global.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_configs.c similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c rename to drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_configs.c diff --git a/drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_params.c similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c rename to drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_params.c diff --git a/drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.c b/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_states.c similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.c rename to drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_states.c diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/csi_rx.c b/drivers/staging/media/atomisp/pci/css_2401_system/host/csi_rx.c similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/csi_rx.c rename to drivers/staging/media/atomisp/pci/css_2401_system/host/csi_rx.c diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/csi_rx_local.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/csi_rx_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/csi_rx_local.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/csi_rx_local.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/csi_rx_private.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/csi_rx_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/csi_rx_private.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/csi_rx_private.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/ibuf_ctrl.c b/drivers/staging/media/atomisp/pci/css_2401_system/host/ibuf_ctrl.c similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/ibuf_ctrl.c rename to drivers/staging/media/atomisp/pci/css_2401_system/host/ibuf_ctrl.c diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/ibuf_ctrl_local.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/ibuf_ctrl_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/ibuf_ctrl_local.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/ibuf_ctrl_local.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/ibuf_ctrl_private.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/ibuf_ctrl_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/ibuf_ctrl_private.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/ibuf_ctrl_private.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_dma.c b/drivers/staging/media/atomisp/pci/css_2401_system/host/isys_dma.c similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_dma.c rename to drivers/staging/media/atomisp/pci/css_2401_system/host/isys_dma.c diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_dma_local.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/isys_dma_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_dma_local.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/isys_dma_local.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_dma_private.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/isys_dma_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_dma_private.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/isys_dma_private.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_irq.c b/drivers/staging/media/atomisp/pci/css_2401_system/host/isys_irq.c similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_irq.c rename to drivers/staging/media/atomisp/pci/css_2401_system/host/isys_irq.c diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_irq_local.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/isys_irq_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_irq_local.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/isys_irq_local.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_irq_private.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/isys_irq_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_irq_private.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/isys_irq_private.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_stream2mmio.c b/drivers/staging/media/atomisp/pci/css_2401_system/host/isys_stream2mmio.c similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_stream2mmio.c rename to drivers/staging/media/atomisp/pci/css_2401_system/host/isys_stream2mmio.c diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_stream2mmio_local.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/isys_stream2mmio_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_stream2mmio_local.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/isys_stream2mmio_local.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_stream2mmio_private.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/isys_stream2mmio_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_stream2mmio_private.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/isys_stream2mmio_private.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/pixelgen_local.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/pixelgen_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/pixelgen_local.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/pixelgen_local.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/pixelgen_private.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/pixelgen_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/pixelgen_private.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/pixelgen_private.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h b/drivers/staging/media/atomisp/pci/css_2401_system/hrt/PixelGen_SysBlock_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h rename to drivers/staging/media/atomisp/pci/css_2401_system/hrt/PixelGen_SysBlock_defs.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/ibuf_cntrl_defs.h b/drivers/staging/media/atomisp/pci/css_2401_system/hrt/ibuf_cntrl_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/ibuf_cntrl_defs.h rename to drivers/staging/media/atomisp/pci/css_2401_system/hrt/ibuf_cntrl_defs.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/mipi_backend_common_defs.h b/drivers/staging/media/atomisp/pci/css_2401_system/hrt/mipi_backend_common_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/mipi_backend_common_defs.h rename to drivers/staging/media/atomisp/pci/css_2401_system/hrt/mipi_backend_common_defs.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/mipi_backend_defs.h b/drivers/staging/media/atomisp/pci/css_2401_system/hrt/mipi_backend_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/mipi_backend_defs.h rename to drivers/staging/media/atomisp/pci/css_2401_system/hrt/mipi_backend_defs.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/rx_csi_defs.h b/drivers/staging/media/atomisp/pci/css_2401_system/hrt/rx_csi_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/rx_csi_defs.h rename to drivers/staging/media/atomisp/pci/css_2401_system/hrt/rx_csi_defs.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/stream2mmio_defs.h b/drivers/staging/media/atomisp/pci/css_2401_system/hrt/stream2mmio_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/stream2mmio_defs.h rename to drivers/staging/media/atomisp/pci/css_2401_system/hrt/stream2mmio_defs.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/ibuf_ctrl_global.h b/drivers/staging/media/atomisp/pci/css_2401_system/ibuf_ctrl_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/ibuf_ctrl_global.h rename to drivers/staging/media/atomisp/pci/css_2401_system/ibuf_ctrl_global.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/isys_dma_global.h b/drivers/staging/media/atomisp/pci/css_2401_system/isys_dma_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/isys_dma_global.h rename to drivers/staging/media/atomisp/pci/css_2401_system/isys_dma_global.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/isys_irq_global.h b/drivers/staging/media/atomisp/pci/css_2401_system/isys_irq_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/isys_irq_global.h rename to drivers/staging/media/atomisp/pci/css_2401_system/isys_irq_global.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/isys_stream2mmio_global.h b/drivers/staging/media/atomisp/pci/css_2401_system/isys_stream2mmio_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/isys_stream2mmio_global.h rename to drivers/staging/media/atomisp/pci/css_2401_system/isys_stream2mmio_global.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/pixelgen_global.h b/drivers/staging/media/atomisp/pci/css_2401_system/pixelgen_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/pixelgen_global.h rename to drivers/staging/media/atomisp/pci/css_2401_system/pixelgen_global.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_system/spmem_dump.c b/drivers/staging/media/atomisp/pci/css_2401_system/spmem_dump.c index 9d04939..9d96d52 100644 --- a/drivers/staging/media/atomisp/pci/css_2401_system/spmem_dump.c +++ b/drivers/staging/media/atomisp/pci/css_2401_system/spmem_dump.c @@ -21,219 +21,215 @@ #define _hrt_cell_load_program_sp(proc) _hrt_cell_load_program_embedded(proc, sp) -/* function input_system_acquisition_stop: AD8 */ +/* function longjmp: 6A0B */ -/* function longjmp: 69C1 */ +/* function tmpmem_init_dmem: 671E */ -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_HIVE_IF_SRST_MASK -#define HIVE_MEM_HIVE_IF_SRST_MASK scalar_processor_2400_dmem -#define HIVE_ADDR_HIVE_IF_SRST_MASK 0x1C8 -#define HIVE_SIZE_HIVE_IF_SRST_MASK 16 -#else -#endif -#endif -#define HIVE_MEM_sp_HIVE_IF_SRST_MASK scalar_processor_2400_dmem -#define HIVE_ADDR_sp_HIVE_IF_SRST_MASK 0x1C8 -#define HIVE_SIZE_sp_HIVE_IF_SRST_MASK 16 +/* function ia_css_dmaproxy_sp_set_addr_B: 3DC5 */ -/* function tmpmem_init_dmem: 66D4 */ - -/* function ia_css_isys_sp_token_map_receive_ack: 6018 */ - -/* function ia_css_dmaproxy_sp_set_addr_B: 3539 */ - -/* function ia_css_pipe_data_init_tagger_resources: A4F */ +/* function ia_css_pipe_data_init_tagger_resources: AC7 */ /* function debug_buffer_set_ddr_addr: DD */ -/* function receiver_port_reg_load: ABC */ - #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_mipi #define HIVE_MEM_vbuf_mipi scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_mipi 0x6378 +#define HIVE_ADDR_vbuf_mipi 0x7444 #define HIVE_SIZE_vbuf_mipi 12 #else #endif #endif #define HIVE_MEM_sp_vbuf_mipi scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_mipi 0x6378 +#define HIVE_ADDR_sp_vbuf_mipi 0x7444 #define HIVE_SIZE_sp_vbuf_mipi 12 -/* function ia_css_event_sp_decode: 372A */ +/* function ia_css_event_sp_decode: 3FB6 */ -/* function ia_css_queue_get_size: 4B46 */ +/* function ia_css_queue_get_size: 53C8 */ -/* function ia_css_queue_load: 515D */ +/* function ia_css_queue_load: 59DF */ -/* function setjmp: 69CA */ +/* function setjmp: 6A14 */ + +/* function ia_css_pipeline_sp_sfi_get_current_frame: 2790 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_sp2host_isys_event_queue #define HIVE_MEM_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x46CC +#define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x57FC #define HIVE_SIZE_sem_for_sp2host_isys_event_queue 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x46CC +#define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x57FC #define HIVE_SIZE_sp_sem_for_sp2host_isys_event_queue 20 -/* function ia_css_dmaproxy_sp_wait_for_ack: 6F4B */ +/* function ia_css_dmaproxy_sp_wait_for_ack: 6FF7 */ -/* function ia_css_sp_rawcopy_func: 5382 */ +/* function ia_css_sp_rawcopy_func: 5B4A */ -/* function ia_css_tagger_buf_sp_pop_marked: 2BB2 */ +/* function ia_css_tagger_buf_sp_pop_marked: 345C */ + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_N_CSI_RX_BE_SID_WIDTH +#define HIVE_MEM_N_CSI_RX_BE_SID_WIDTH scalar_processor_2400_dmem +#define HIVE_ADDR_N_CSI_RX_BE_SID_WIDTH 0x1D0 +#define HIVE_SIZE_N_CSI_RX_BE_SID_WIDTH 12 +#else +#endif +#endif +#define HIVE_MEM_sp_N_CSI_RX_BE_SID_WIDTH scalar_processor_2400_dmem +#define HIVE_ADDR_sp_N_CSI_RX_BE_SID_WIDTH 0x1D0 +#define HIVE_SIZE_sp_N_CSI_RX_BE_SID_WIDTH 12 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_stage #define HIVE_MEM_isp_stage scalar_processor_2400_dmem -#define HIVE_ADDR_isp_stage 0x5C60 +#define HIVE_ADDR_isp_stage 0x6D48 #define HIVE_SIZE_isp_stage 832 #else #endif #endif #define HIVE_MEM_sp_isp_stage scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_stage 0x5C60 +#define HIVE_ADDR_sp_isp_stage 0x6D48 #define HIVE_SIZE_sp_isp_stage 832 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_raw #define HIVE_MEM_vbuf_raw scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_raw 0x30C +#define HIVE_ADDR_vbuf_raw 0x394 #define HIVE_SIZE_vbuf_raw 4 #else #endif #endif #define HIVE_MEM_sp_vbuf_raw scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_raw 0x30C +#define HIVE_ADDR_sp_vbuf_raw 0x394 #define HIVE_SIZE_sp_vbuf_raw 4 -/* function ia_css_sp_bin_copy_func: 52A9 */ +/* function ia_css_sp_bin_copy_func: 5B2B */ + +/* function ia_css_queue_item_store: 572D */ -/* function ia_css_queue_item_store: 4EAB */ +/* function input_system_reset: 1201 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs #define HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AFC +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5BE4 #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_metadata_bufs 20 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AFC +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5BE4 #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 20 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs #define HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4B10 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5BF8 #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_buffer_bufs 160 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4B10 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5BF8 #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 160 -/* function sp_start_isp: 45D */ +/* function sp_start_isp: 39C */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_binary_group #define HIVE_MEM_sp_binary_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_binary_group 0x6050 +#define HIVE_ADDR_sp_binary_group 0x7138 #define HIVE_SIZE_sp_binary_group 32 #else #endif #endif #define HIVE_MEM_sp_sp_binary_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_binary_group 0x6050 +#define HIVE_ADDR_sp_sp_binary_group 0x7138 #define HIVE_SIZE_sp_sp_binary_group 32 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_sw_state #define HIVE_MEM_sp_sw_state scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sw_state 0x6308 +#define HIVE_ADDR_sp_sw_state 0x73F0 #define HIVE_SIZE_sp_sw_state 4 #else #endif #endif #define HIVE_MEM_sp_sp_sw_state scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_sw_state 0x6308 +#define HIVE_ADDR_sp_sp_sw_state 0x73F0 #define HIVE_SIZE_sp_sp_sw_state 4 -/* function ia_css_thread_sp_main: D50 */ +/* function ia_css_thread_sp_main: 136D */ -/* function ia_css_ispctrl_sp_init_internal_buffers: 396B */ +/* function ia_css_ispctrl_sp_init_internal_buffers: 41F7 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp2host_psys_event_queue_handle #define HIVE_MEM_sp2host_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_psys_event_queue_handle 0x4BB0 +#define HIVE_ADDR_sp2host_psys_event_queue_handle 0x5C98 #define HIVE_SIZE_sp2host_psys_event_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_sp2host_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x4BB0 +#define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x5C98 #define HIVE_SIZE_sp_sp2host_psys_event_queue_handle 12 +/* function pixelgen_unit_test: E62 */ + #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_sp2host_psys_event_queue #define HIVE_MEM_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x46E0 +#define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x5810 #define HIVE_SIZE_sem_for_sp2host_psys_event_queue 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x46E0 +#define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x5810 #define HIVE_SIZE_sp_sem_for_sp2host_psys_event_queue 20 -/* function ia_css_tagger_sp_propagate_frame: 2479 */ - -/* function input_system_reg_load: B11 */ +/* function ia_css_tagger_sp_propagate_frame: 2D23 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_handles #define HIVE_MEM_vbuf_handles scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_handles 0x6384 +#define HIVE_ADDR_vbuf_handles 0x7450 #define HIVE_SIZE_vbuf_handles 960 #else #endif #endif #define HIVE_MEM_sp_vbuf_handles scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_handles 0x6384 +#define HIVE_ADDR_sp_vbuf_handles 0x7450 #define HIVE_SIZE_sp_vbuf_handles 960 -/* function ia_css_queue_store: 5011 */ +/* function ia_css_queue_store: 5893 */ -/* function ia_css_sp_flash_register: 2DE7 */ +/* function ia_css_sp_flash_register: 3691 */ -/* function ia_css_isys_sp_backend_create: 5C8B */ +/* function ia_css_pipeline_sp_init: 1FD7 */ -/* function ia_css_pipeline_sp_init: 1886 */ +/* function ia_css_tagger_sp_configure: 2C13 */ -/* function ia_css_tagger_sp_configure: 2369 */ - -/* function ia_css_ispctrl_sp_end_binary: 3773 */ +/* function ia_css_ispctrl_sp_end_binary: 3FFF */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs #define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4BBC +#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5CA4 #define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4BBC +#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5CA4 #define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 -/* function receiver_port_reg_store: AC3 */ +/* function pixelgen_tpg_run: F18 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_event_is_pending_mask @@ -250,182 +246,228 @@ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cb_elems_frame #define HIVE_MEM_sp_all_cb_elems_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cb_elems_frame 0x46F4 +#define HIVE_ADDR_sp_all_cb_elems_frame 0x5824 #define HIVE_SIZE_sp_all_cb_elems_frame 16 #else #endif #endif #define HIVE_MEM_sp_sp_all_cb_elems_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x46F4 +#define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x5824 #define HIVE_SIZE_sp_sp_all_cb_elems_frame 16 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp2host_isys_event_queue_handle #define HIVE_MEM_sp2host_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_isys_event_queue_handle 0x4BD0 +#define HIVE_ADDR_sp2host_isys_event_queue_handle 0x5CB8 #define HIVE_SIZE_sp2host_isys_event_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_sp2host_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x4BD0 +#define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x5CB8 #define HIVE_SIZE_sp_sp2host_isys_event_queue_handle 12 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host_sp_com #define HIVE_MEM_host_sp_com scalar_processor_2400_dmem -#define HIVE_ADDR_host_sp_com 0x4134 +#define HIVE_ADDR_host_sp_com 0x3E6C #define HIVE_SIZE_host_sp_com 220 #else #endif #endif #define HIVE_MEM_sp_host_sp_com scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host_sp_com 0x4134 +#define HIVE_ADDR_sp_host_sp_com 0x3E6C #define HIVE_SIZE_sp_host_sp_com 220 -/* function ia_css_queue_get_free_space: 4C70 */ +/* function ia_css_queue_get_free_space: 54F2 */ -/* function exec_image_pipe: 658 */ +/* function exec_image_pipe: 57A */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_init_dmem_data #define HIVE_MEM_sp_init_dmem_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_init_dmem_data 0x630C +#define HIVE_ADDR_sp_init_dmem_data 0x73F4 #define HIVE_SIZE_sp_init_dmem_data 24 #else #endif #endif #define HIVE_MEM_sp_sp_init_dmem_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_init_dmem_data 0x630C +#define HIVE_ADDR_sp_sp_init_dmem_data 0x73F4 #define HIVE_SIZE_sp_sp_init_dmem_data 24 -/* function ia_css_sp_metadata_start: 5A68 */ +/* function ia_css_sp_metadata_start: 5EB3 */ -/* function ia_css_bufq_sp_init_buffer_queues: 2E56 */ +/* function ia_css_bufq_sp_init_buffer_queues: 36E2 */ -/* function ia_css_pipeline_sp_stop: 1869 */ +/* function ia_css_pipeline_sp_stop: 1FBA */ -/* function ia_css_tagger_sp_connect_pipes: 2853 */ +/* function ia_css_tagger_sp_connect_pipes: 30FD */ -/* function sp_isys_copy_wait: 6A1 */ +/* function sp_isys_copy_wait: 5D8 */ /* function is_isp_debug_buffer_full: 337 */ -/* function ia_css_dmaproxy_sp_configure_channel_from_info: 34A9 */ +/* function ia_css_dmaproxy_sp_configure_channel_from_info: 3D35 */ + +/* function encode_and_post_timer_event: A3C */ + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_input_system_bz2788_active +#define HIVE_MEM_input_system_bz2788_active scalar_processor_2400_dmem +#define HIVE_ADDR_input_system_bz2788_active 0x2524 +#define HIVE_SIZE_input_system_bz2788_active 4 +#else +#endif +#endif +#define HIVE_MEM_sp_input_system_bz2788_active scalar_processor_2400_dmem +#define HIVE_ADDR_sp_input_system_bz2788_active 0x2524 +#define HIVE_SIZE_sp_input_system_bz2788_active 4 -/* function encode_and_post_timer_event: 9C4 */ +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_N_IBUF_CTRL_PROCS +#define HIVE_MEM_N_IBUF_CTRL_PROCS scalar_processor_2400_dmem +#define HIVE_ADDR_N_IBUF_CTRL_PROCS 0x1FC +#define HIVE_SIZE_N_IBUF_CTRL_PROCS 12 +#else +#endif +#endif +#define HIVE_MEM_sp_N_IBUF_CTRL_PROCS scalar_processor_2400_dmem +#define HIVE_ADDR_sp_N_IBUF_CTRL_PROCS 0x1FC +#define HIVE_SIZE_sp_N_IBUF_CTRL_PROCS 12 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_per_frame_data #define HIVE_MEM_sp_per_frame_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_per_frame_data 0x4210 +#define HIVE_ADDR_sp_per_frame_data 0x3F48 #define HIVE_SIZE_sp_per_frame_data 4 #else #endif #endif #define HIVE_MEM_sp_sp_per_frame_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_per_frame_data 0x4210 +#define HIVE_ADDR_sp_sp_per_frame_data 0x3F48 #define HIVE_SIZE_sp_sp_per_frame_data 4 -/* function ia_css_rmgr_sp_vbuf_dequeue: 6428 */ +/* function ia_css_rmgr_sp_vbuf_dequeue: 6472 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host2sp_psys_event_queue_handle #define HIVE_MEM_host2sp_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_psys_event_queue_handle 0x4BDC +#define HIVE_ADDR_host2sp_psys_event_queue_handle 0x5CC4 #define HIVE_SIZE_host2sp_psys_event_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_host2sp_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x4BDC +#define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x5CC4 #define HIVE_SIZE_sp_host2sp_psys_event_queue_handle 12 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_xmem_bin_addr #define HIVE_MEM_xmem_bin_addr scalar_processor_2400_dmem -#define HIVE_ADDR_xmem_bin_addr 0x4214 +#define HIVE_ADDR_xmem_bin_addr 0x3F4C #define HIVE_SIZE_xmem_bin_addr 4 #else #endif #endif #define HIVE_MEM_sp_xmem_bin_addr scalar_processor_2400_dmem -#define HIVE_ADDR_sp_xmem_bin_addr 0x4214 +#define HIVE_ADDR_sp_xmem_bin_addr 0x3F4C #define HIVE_SIZE_sp_xmem_bin_addr 4 -/* function tmr_clock_init: 141C */ +/* function tmr_clock_init: 166F */ -/* function ia_css_pipeline_sp_run: 143D */ +/* function ia_css_pipeline_sp_run: 1A61 */ -/* function memcpy: 6A6A */ +/* function memcpy: 6AB4 */ + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_N_ISYS2401_DMA_CHANNEL_PROCS +#define HIVE_MEM_N_ISYS2401_DMA_CHANNEL_PROCS scalar_processor_2400_dmem +#define HIVE_ADDR_N_ISYS2401_DMA_CHANNEL_PROCS 0x214 +#define HIVE_SIZE_N_ISYS2401_DMA_CHANNEL_PROCS 4 +#else +#endif +#endif +#define HIVE_MEM_sp_N_ISYS2401_DMA_CHANNEL_PROCS scalar_processor_2400_dmem +#define HIVE_ADDR_sp_N_ISYS2401_DMA_CHANNEL_PROCS 0x214 +#define HIVE_SIZE_sp_N_ISYS2401_DMA_CHANNEL_PROCS 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_GP_DEVICE_BASE #define HIVE_MEM_GP_DEVICE_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_GP_DEVICE_BASE 0x314 +#define HIVE_ADDR_GP_DEVICE_BASE 0x39C #define HIVE_SIZE_GP_DEVICE_BASE 4 #else #endif #endif #define HIVE_MEM_sp_GP_DEVICE_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_GP_DEVICE_BASE 0x314 +#define HIVE_ADDR_sp_GP_DEVICE_BASE 0x39C #define HIVE_SIZE_sp_GP_DEVICE_BASE 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_thread_sp_ready_queue #define HIVE_MEM_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x1E4 +#define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x27C #define HIVE_SIZE_ia_css_thread_sp_ready_queue 12 #else #endif #endif #define HIVE_MEM_sp_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x1E4 +#define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x27C #define HIVE_SIZE_sp_ia_css_thread_sp_ready_queue 12 -/* function input_system_reg_store: B18 */ +/* function stream2mmio_send_command: E04 */ -/* function ia_css_isys_sp_frontend_start: 5EA1 */ +/* function ia_css_uds_sp_scale_params: 67BD */ -/* function ia_css_uds_sp_scale_params: 6773 */ +/* function ia_css_circbuf_increase_size: 1452 */ -/* function ia_css_circbuf_increase_size: E35 */ +/* function __divu: 6A32 */ -/* function __divu: 69E8 */ - -/* function ia_css_thread_sp_get_state: C78 */ +/* function ia_css_thread_sp_get_state: 1295 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_cont_capt_stop #define HIVE_MEM_sem_for_cont_capt_stop scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_cont_capt_stop 0x4704 +#define HIVE_ADDR_sem_for_cont_capt_stop 0x5834 #define HIVE_SIZE_sem_for_cont_capt_stop 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_cont_capt_stop scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x4704 +#define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x5834 #define HIVE_SIZE_sp_sem_for_cont_capt_stop 20 -/* function thread_fiber_sp_main: E2E */ +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_N_SHORT_PACKET_LUT_ENTRIES +#define HIVE_MEM_N_SHORT_PACKET_LUT_ENTRIES scalar_processor_2400_dmem +#define HIVE_ADDR_N_SHORT_PACKET_LUT_ENTRIES 0x1AC +#define HIVE_SIZE_N_SHORT_PACKET_LUT_ENTRIES 12 +#else +#endif +#endif +#define HIVE_MEM_sp_N_SHORT_PACKET_LUT_ENTRIES scalar_processor_2400_dmem +#define HIVE_ADDR_sp_N_SHORT_PACKET_LUT_ENTRIES 0x1AC +#define HIVE_SIZE_sp_N_SHORT_PACKET_LUT_ENTRIES 12 + +/* function thread_fiber_sp_main: 144B */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_isp_pipe_thread #define HIVE_MEM_sp_isp_pipe_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_pipe_thread 0x4848 +#define HIVE_ADDR_sp_isp_pipe_thread 0x5978 #define HIVE_SIZE_sp_isp_pipe_thread 360 #else #endif #endif #define HIVE_MEM_sp_sp_isp_pipe_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_pipe_thread 0x4848 +#define HIVE_ADDR_sp_sp_isp_pipe_thread 0x5978 #define HIVE_SIZE_sp_sp_isp_pipe_thread 360 -/* function ia_css_parambuf_sp_handle_parameter_sets: 127F */ +/* function ia_css_parambuf_sp_handle_parameter_sets: 18B5 */ -/* function ia_css_spctrl_sp_set_state: 5A97 */ +/* function ia_css_spctrl_sp_set_state: 5ECF */ -/* function ia_css_thread_sem_sp_signal: 6C6C */ +/* function ia_css_thread_sem_sp_signal: 6D18 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_IRQ_BASE @@ -439,6 +481,8 @@ #define HIVE_ADDR_sp_IRQ_BASE 0x2C #define HIVE_SIZE_sp_IRQ_BASE 16 +/* function ia_css_virtual_isys_sp_isr_init: 5F70 */ + #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_TIMED_CTRL_BASE #define HIVE_MEM_TIMED_CTRL_BASE scalar_processor_2400_dmem @@ -451,212 +495,220 @@ #define HIVE_ADDR_sp_TIMED_CTRL_BASE 0x40 #define HIVE_SIZE_sp_TIMED_CTRL_BASE 4 -/* function ia_css_isys_sp_isr: 7139 */ +/* function ia_css_isys_sp_generate_exp_id: 6302 */ -/* function ia_css_isys_sp_generate_exp_id: 6239 */ +/* function ia_css_rmgr_sp_init: 636D */ -/* function ia_css_rmgr_sp_init: 6323 */ - -/* function ia_css_thread_sem_sp_init: 6D3B */ +/* function ia_css_thread_sem_sp_init: 6DE7 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_reading_cb_frame #define HIVE_MEM_sem_for_reading_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_cb_frame 0x4718 +#define HIVE_ADDR_sem_for_reading_cb_frame 0x5848 #define HIVE_SIZE_sem_for_reading_cb_frame 40 #else #endif #endif #define HIVE_MEM_sp_sem_for_reading_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x4718 +#define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x5848 #define HIVE_SIZE_sp_sem_for_reading_cb_frame 40 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_is_isp_requested #define HIVE_MEM_is_isp_requested scalar_processor_2400_dmem -#define HIVE_ADDR_is_isp_requested 0x320 +#define HIVE_ADDR_is_isp_requested 0x3A8 #define HIVE_SIZE_is_isp_requested 4 #else #endif #endif #define HIVE_MEM_sp_is_isp_requested scalar_processor_2400_dmem -#define HIVE_ADDR_sp_is_isp_requested 0x320 +#define HIVE_ADDR_sp_is_isp_requested 0x3A8 #define HIVE_SIZE_sp_is_isp_requested 4 -/* function ia_css_dmaproxy_sp_execute: 340F */ +/* function ia_css_dmaproxy_sp_execute: 3C9B */ + +/* function csi_rx_backend_rst: CE0 */ -/* function ia_css_queue_is_empty: 7098 */ +/* function ia_css_queue_is_empty: 7144 */ -/* function ia_css_pipeline_sp_has_stopped: 185F */ +/* function ia_css_pipeline_sp_has_stopped: 1FB0 */ -/* function ia_css_circbuf_extract: F39 */ +/* function ia_css_circbuf_extract: 1556 */ -/* function ia_css_tagger_buf_sp_is_locked_from_start: 2CC8 */ +/* function ia_css_tagger_buf_sp_is_locked_from_start: 3572 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_current_sp_thread #define HIVE_MEM_current_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_current_sp_thread 0x1DC +#define HIVE_ADDR_current_sp_thread 0x274 #define HIVE_SIZE_current_sp_thread 4 #else #endif #endif #define HIVE_MEM_sp_current_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_current_sp_thread 0x1DC +#define HIVE_ADDR_sp_current_sp_thread 0x274 #define HIVE_SIZE_sp_current_sp_thread 4 -/* function ia_css_spctrl_sp_get_spid: 5A9E */ +/* function ia_css_spctrl_sp_get_spid: 5ED6 */ -/* function ia_css_bufq_sp_reset_buffers: 2EDD */ +/* function ia_css_bufq_sp_reset_buffers: 3769 */ -/* function ia_css_dmaproxy_sp_read_byte_addr: 6F79 */ +/* function ia_css_dmaproxy_sp_read_byte_addr: 7025 */ -/* function ia_css_rmgr_sp_uninit: 631C */ +/* function ia_css_rmgr_sp_uninit: 6366 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_threads_stack #define HIVE_MEM_sp_threads_stack scalar_processor_2400_dmem #define HIVE_ADDR_sp_threads_stack 0x164 -#define HIVE_SIZE_sp_threads_stack 28 +#define HIVE_SIZE_sp_threads_stack 24 #else #endif #endif #define HIVE_MEM_sp_sp_threads_stack scalar_processor_2400_dmem #define HIVE_ADDR_sp_sp_threads_stack 0x164 -#define HIVE_SIZE_sp_sp_threads_stack 28 +#define HIVE_SIZE_sp_sp_threads_stack 24 -/* function ia_css_circbuf_peek: F1B */ +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_N_STREAM2MMIO_SID_PROCS +#define HIVE_MEM_N_STREAM2MMIO_SID_PROCS scalar_processor_2400_dmem +#define HIVE_ADDR_N_STREAM2MMIO_SID_PROCS 0x218 +#define HIVE_SIZE_N_STREAM2MMIO_SID_PROCS 12 +#else +#endif +#endif +#define HIVE_MEM_sp_N_STREAM2MMIO_SID_PROCS scalar_processor_2400_dmem +#define HIVE_ADDR_sp_N_STREAM2MMIO_SID_PROCS 0x218 +#define HIVE_SIZE_sp_N_STREAM2MMIO_SID_PROCS 12 -/* function ia_css_parambuf_sp_wait_for_in_param: 1048 */ +/* function ia_css_circbuf_peek: 1538 */ -/* function ia_css_isys_sp_token_map_get_exp_id: 6101 */ +/* function ia_css_parambuf_sp_wait_for_in_param: 167E */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cb_elems_param #define HIVE_MEM_sp_all_cb_elems_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cb_elems_param 0x4740 +#define HIVE_ADDR_sp_all_cb_elems_param 0x5870 #define HIVE_SIZE_sp_all_cb_elems_param 16 #else #endif #endif #define HIVE_MEM_sp_sp_all_cb_elems_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cb_elems_param 0x4740 +#define HIVE_ADDR_sp_sp_all_cb_elems_param 0x5870 #define HIVE_SIZE_sp_sp_all_cb_elems_param 16 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_pipeline_sp_curr_binary_id #define HIVE_MEM_pipeline_sp_curr_binary_id scalar_processor_2400_dmem -#define HIVE_ADDR_pipeline_sp_curr_binary_id 0x1F0 +#define HIVE_ADDR_pipeline_sp_curr_binary_id 0x288 #define HIVE_SIZE_pipeline_sp_curr_binary_id 4 #else #endif #endif #define HIVE_MEM_sp_pipeline_sp_curr_binary_id scalar_processor_2400_dmem -#define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x1F0 +#define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x288 #define HIVE_SIZE_sp_pipeline_sp_curr_binary_id 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cbs_frame_desc #define HIVE_MEM_sp_all_cbs_frame_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_frame_desc 0x4750 +#define HIVE_ADDR_sp_all_cbs_frame_desc 0x5880 #define HIVE_SIZE_sp_all_cbs_frame_desc 8 #else #endif #endif #define HIVE_MEM_sp_sp_all_cbs_frame_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x4750 +#define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x5880 #define HIVE_SIZE_sp_sp_all_cbs_frame_desc 8 -/* function sp_isys_copy_func_v2: 69A */ +/* function sp_isys_copy_func_v2: 5BD */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_reading_cb_param #define HIVE_MEM_sem_for_reading_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_cb_param 0x4758 +#define HIVE_ADDR_sem_for_reading_cb_param 0x5888 #define HIVE_SIZE_sem_for_reading_cb_param 40 #else #endif #endif #define HIVE_MEM_sp_sem_for_reading_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_cb_param 0x4758 +#define HIVE_ADDR_sp_sem_for_reading_cb_param 0x5888 #define HIVE_SIZE_sp_sem_for_reading_cb_param 40 -/* function ia_css_queue_get_used_space: 4C24 */ +/* function ia_css_queue_get_used_space: 54A6 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_cont_capt_start #define HIVE_MEM_sem_for_cont_capt_start scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_cont_capt_start 0x4780 +#define HIVE_ADDR_sem_for_cont_capt_start 0x58B0 #define HIVE_SIZE_sem_for_cont_capt_start 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_cont_capt_start scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_cont_capt_start 0x4780 +#define HIVE_ADDR_sp_sem_for_cont_capt_start 0x58B0 #define HIVE_SIZE_sp_sem_for_cont_capt_start 20 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_tmp_heap #define HIVE_MEM_tmp_heap scalar_processor_2400_dmem -#define HIVE_ADDR_tmp_heap 0x6070 +#define HIVE_ADDR_tmp_heap 0x7158 #define HIVE_SIZE_tmp_heap 640 #else #endif #endif #define HIVE_MEM_sp_tmp_heap scalar_processor_2400_dmem -#define HIVE_ADDR_sp_tmp_heap 0x6070 +#define HIVE_ADDR_sp_tmp_heap 0x7158 #define HIVE_SIZE_sp_tmp_heap 640 -/* function ia_css_rmgr_sp_get_num_vbuf: 662C */ +/* function ia_css_rmgr_sp_get_num_vbuf: 6676 */ -/* function ia_css_ispctrl_sp_output_compute_dma_info: 41A5 */ +/* function ia_css_ispctrl_sp_output_compute_dma_info: 4A27 */ -/* function ia_css_tagger_sp_lock_exp_id: 2136 */ +/* function ia_css_tagger_sp_lock_exp_id: 29E0 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs #define HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4BE8 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5CD0 #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_s3a_bufs 60 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4BE8 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5CD0 #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 60 -/* function ia_css_queue_is_full: 4CBB */ +/* function ia_css_queue_is_full: 553D */ /* function debug_buffer_init_isp: E4 */ -/* function ia_css_isys_sp_frontend_uninit: 5E5B */ - -/* function ia_css_tagger_sp_exp_id_is_locked: 206C */ +/* function ia_css_tagger_sp_exp_id_is_locked: 2916 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem #define HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x6744 +#define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x7810 #define HIVE_SIZE_ia_css_rmgr_sp_mipi_frame_sem 60 #else #endif #endif #define HIVE_MEM_sp_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x6744 +#define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x7810 #define HIVE_SIZE_sp_ia_css_rmgr_sp_mipi_frame_sem 60 -/* function ia_css_rmgr_sp_refcount_dump: 6403 */ +/* function ia_css_rmgr_sp_refcount_dump: 644D */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id #define HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4C24 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5D0C #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4C24 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5D0C #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 #ifndef HIVE_MULTIPLE_PROGRAMS @@ -671,65 +723,77 @@ #define HIVE_ADDR_sp_sp_pipe_threads 0x150 #define HIVE_SIZE_sp_sp_pipe_threads 20 -/* function sp_event_proxy_func: 6AF */ +/* function sp_event_proxy_func: 721 */ + +/* function ibuf_ctrl_run: D79 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host2sp_isys_event_queue_handle #define HIVE_MEM_host2sp_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_isys_event_queue_handle 0x4C38 +#define HIVE_ADDR_host2sp_isys_event_queue_handle 0x5D20 #define HIVE_SIZE_host2sp_isys_event_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_host2sp_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x4C38 +#define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x5D20 #define HIVE_SIZE_sp_host2sp_isys_event_queue_handle 12 -/* function ia_css_thread_sp_yield: 6BEA */ +/* function ia_css_thread_sp_yield: 6C96 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cbs_param_desc #define HIVE_MEM_sp_all_cbs_param_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_param_desc 0x4794 +#define HIVE_ADDR_sp_all_cbs_param_desc 0x58C4 #define HIVE_SIZE_sp_all_cbs_param_desc 8 #else #endif #endif #define HIVE_MEM_sp_sp_all_cbs_param_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x4794 +#define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x58C4 #define HIVE_SIZE_sp_sp_all_cbs_param_desc 8 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb #define HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x5C50 +#define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x6D38 #define HIVE_SIZE_ia_css_dmaproxy_sp_invalidate_tlb 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x5C50 +#define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x6D38 #define HIVE_SIZE_sp_ia_css_dmaproxy_sp_invalidate_tlb 4 -/* function ia_css_thread_sp_fork: D05 */ +/* function ia_css_thread_sp_fork: 1322 */ -/* function ia_css_tagger_sp_destroy: 285D */ +/* function ia_css_tagger_sp_destroy: 3107 */ -/* function ia_css_dmaproxy_sp_vmem_read: 33AF */ +/* function ia_css_dmaproxy_sp_vmem_read: 3C3B */ -/* function ia_css_ifmtr_sp_init: 628A */ +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_N_LONG_PACKET_LUT_ENTRIES +#define HIVE_MEM_N_LONG_PACKET_LUT_ENTRIES scalar_processor_2400_dmem +#define HIVE_ADDR_N_LONG_PACKET_LUT_ENTRIES 0x1B8 +#define HIVE_SIZE_N_LONG_PACKET_LUT_ENTRIES 12 +#else +#endif +#endif +#define HIVE_MEM_sp_N_LONG_PACKET_LUT_ENTRIES scalar_processor_2400_dmem +#define HIVE_ADDR_sp_N_LONG_PACKET_LUT_ENTRIES 0x1B8 +#define HIVE_SIZE_sp_N_LONG_PACKET_LUT_ENTRIES 12 -/* function initialize_sp_group: 668 */ +/* function initialize_sp_group: 58A */ -/* function ia_css_tagger_buf_sp_peek: 2AD4 */ +/* function ia_css_tagger_buf_sp_peek: 337E */ -/* function ia_css_thread_sp_init: D31 */ +/* function ia_css_thread_sp_init: 134E */ -/* function ia_css_isys_sp_reset_exp_id: 6231 */ +/* function qos_scheduler_update_fps: 67AD */ -/* function qos_scheduler_update_fps: 6763 */ +/* function ia_css_isys_sp_reset_exp_id: 62F9 */ -/* function ia_css_ispctrl_sp_set_stream_base_addr: 4892 */ +/* function ia_css_ispctrl_sp_set_stream_base_addr: 5114 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_DMEM_BASE @@ -755,46 +819,50 @@ #define HIVE_ADDR_sp_SP_DMEM_BASE 0x4 #define HIVE_SIZE_sp_SP_DMEM_BASE 4 -/* function __ia_css_queue_is_empty_text: 4B81 */ +/* function ibuf_ctrl_transfer: D61 */ + +/* function __ia_css_queue_is_empty_text: 5403 */ + +/* function ia_css_dmaproxy_sp_read: 3CB1 */ -/* function ia_css_dmaproxy_sp_read: 3425 */ +/* function virtual_isys_stream_is_capture_done: 5F94 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_raw_copy_line_count #define HIVE_MEM_raw_copy_line_count scalar_processor_2400_dmem -#define HIVE_ADDR_raw_copy_line_count 0x2E0 +#define HIVE_ADDR_raw_copy_line_count 0x378 #define HIVE_SIZE_raw_copy_line_count 4 #else #endif #endif #define HIVE_MEM_sp_raw_copy_line_count scalar_processor_2400_dmem -#define HIVE_ADDR_sp_raw_copy_line_count 0x2E0 +#define HIVE_ADDR_sp_raw_copy_line_count 0x378 #define HIVE_SIZE_sp_raw_copy_line_count 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host2sp_tag_cmd_queue_handle #define HIVE_MEM_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x4C44 +#define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x5D2C #define HIVE_SIZE_host2sp_tag_cmd_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x4C44 +#define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x5D2C #define HIVE_SIZE_sp_host2sp_tag_cmd_queue_handle 12 -/* function ia_css_queue_peek: 4B9A */ +/* function ia_css_queue_peek: 541C */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_flash_sp_frame_cnt #define HIVE_MEM_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x4AF0 +#define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x5BD8 #define HIVE_SIZE_ia_css_flash_sp_frame_cnt 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x4AF0 +#define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x5BD8 #define HIVE_SIZE_sp_ia_css_flash_sp_frame_cnt 4 #ifndef HIVE_MULTIPLE_PROGRAMS @@ -809,136 +877,132 @@ #define HIVE_ADDR_sp_event_can_send_token_mask 0x88 #define HIVE_SIZE_sp_event_can_send_token_mask 44 +/* function csi_rx_frontend_stop: C0B */ + #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_thread #define HIVE_MEM_isp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_isp_thread 0x5FA0 +#define HIVE_ADDR_isp_thread 0x7088 #define HIVE_SIZE_isp_thread 4 #else #endif #endif #define HIVE_MEM_sp_isp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_thread 0x5FA0 +#define HIVE_ADDR_sp_isp_thread 0x7088 #define HIVE_SIZE_sp_isp_thread 4 -/* function encode_and_post_sp_event_non_blocking: A0C */ - -/* function ia_css_isys_sp_frontend_destroy: 5F33 */ +/* function encode_and_post_sp_event_non_blocking: A84 */ /* function is_ddr_debug_buffer_full: 2CC */ -/* function ia_css_isys_sp_frontend_stop: 5E73 */ - -/* function ia_css_isys_sp_token_map_init: 61CF */ - -/* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 2B24 */ +/* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 33CE */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_threads_fiber #define HIVE_MEM_sp_threads_fiber scalar_processor_2400_dmem -#define HIVE_ADDR_sp_threads_fiber 0x19C -#define HIVE_SIZE_sp_threads_fiber 28 +#define HIVE_ADDR_sp_threads_fiber 0x194 +#define HIVE_SIZE_sp_threads_fiber 24 #else #endif #endif #define HIVE_MEM_sp_sp_threads_fiber scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_threads_fiber 0x19C -#define HIVE_SIZE_sp_sp_threads_fiber 28 +#define HIVE_ADDR_sp_sp_threads_fiber 0x194 +#define HIVE_SIZE_sp_sp_threads_fiber 24 -/* function encode_and_post_sp_event: 995 */ +/* function encode_and_post_sp_event: A0D */ /* function debug_enqueue_ddr: EE */ -/* function ia_css_rmgr_sp_refcount_init_vbuf: 63BE */ +/* function ia_css_rmgr_sp_refcount_init_vbuf: 6408 */ -/* function dmaproxy_sp_read_write: 7017 */ +/* function dmaproxy_sp_read_write: 70C3 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer #define HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5C54 +#define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6D3C #define HIVE_SIZE_ia_css_dmaproxy_isp_dma_cmd_buffer 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5C54 +#define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6D3C #define HIVE_SIZE_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host2sp_buffer_queue_handle #define HIVE_MEM_host2sp_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_buffer_queue_handle 0x4C50 +#define HIVE_ADDR_host2sp_buffer_queue_handle 0x5D38 #define HIVE_SIZE_host2sp_buffer_queue_handle 480 #else #endif #endif #define HIVE_MEM_sp_host2sp_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x4C50 +#define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x5D38 #define HIVE_SIZE_sp_host2sp_buffer_queue_handle 480 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_flash_sp_in_service #define HIVE_MEM_ia_css_flash_sp_in_service scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_in_service 0x3198 +#define HIVE_ADDR_ia_css_flash_sp_in_service 0x3074 #define HIVE_SIZE_ia_css_flash_sp_in_service 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_flash_sp_in_service scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3198 +#define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3074 #define HIVE_SIZE_sp_ia_css_flash_sp_in_service 4 -/* function ia_css_dmaproxy_sp_process: 6D63 */ - -/* function ia_css_tagger_buf_sp_mark_from_end: 2DAC */ +/* function ia_css_dmaproxy_sp_process: 6E0F */ -/* function ia_css_isys_sp_backend_rcv_acquire_ack: 5B40 */ +/* function ia_css_tagger_buf_sp_mark_from_end: 3656 */ -/* function ia_css_isys_sp_backend_pre_acquire_request: 5B56 */ +/* function ia_css_ispctrl_sp_init_cs: 40FA */ -/* function ia_css_ispctrl_sp_init_cs: 386E */ +/* function ia_css_spctrl_sp_init: 5EE4 */ -/* function ia_css_spctrl_sp_init: 5AAC */ +/* function sp_event_proxy_init: 736 */ -/* function sp_event_proxy_init: 6C4 */ +/* function input_system_input_port_close: 1095 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick #define HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4E30 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5F18 #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4E30 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5F18 #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_output #define HIVE_MEM_sp_output scalar_processor_2400_dmem -#define HIVE_ADDR_sp_output 0x4218 +#define HIVE_ADDR_sp_output 0x3F50 #define HIVE_SIZE_sp_output 16 #else #endif #endif #define HIVE_MEM_sp_sp_output scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_output 0x4218 +#define HIVE_ADDR_sp_sp_output 0x3F50 #define HIVE_SIZE_sp_sp_output 16 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues #define HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4E58 +#define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5F40 #define HIVE_SIZE_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4E58 +#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5F40 #define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 +/* function pixelgen_prbs_config: E8D */ + #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_CTRL_BASE #define HIVE_MEM_ISP_CTRL_BASE scalar_processor_2400_dmem @@ -963,107 +1027,109 @@ #define HIVE_ADDR_sp_INPUT_FORMATTER_BASE 0x4C #define HIVE_SIZE_sp_INPUT_FORMATTER_BASE 16 -/* function sp_dma_proxy_reset_channels: 3694 */ - -/* function ia_css_isys_sp_backend_acquire: 5C61 */ +/* function sp_dma_proxy_reset_channels: 3F20 */ -/* function ia_css_tagger_sp_update_size: 2AA3 */ +/* function ia_css_tagger_sp_update_size: 334D */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_host_sp_queue #define HIVE_MEM_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x5178 +#define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x6260 #define HIVE_SIZE_ia_css_bufq_host_sp_queue 2008 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x5178 +#define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x6260 #define HIVE_SIZE_sp_ia_css_bufq_host_sp_queue 2008 -/* function thread_fiber_sp_create: D9D */ +/* function thread_fiber_sp_create: 13BA */ -/* function ia_css_dmaproxy_sp_set_increments: 3526 */ +/* function ia_css_dmaproxy_sp_set_increments: 3DB2 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_writing_cb_frame #define HIVE_MEM_sem_for_writing_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_writing_cb_frame 0x479C +#define HIVE_ADDR_sem_for_writing_cb_frame 0x58CC #define HIVE_SIZE_sem_for_writing_cb_frame 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_writing_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x479C +#define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x58CC #define HIVE_SIZE_sp_sem_for_writing_cb_frame 20 -/* function receiver_reg_store: AD1 */ - #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_writing_cb_param #define HIVE_MEM_sem_for_writing_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_writing_cb_param 0x47B0 +#define HIVE_ADDR_sem_for_writing_cb_param 0x58E0 #define HIVE_SIZE_sem_for_writing_cb_param 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_writing_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_writing_cb_param 0x47B0 +#define HIVE_ADDR_sp_sem_for_writing_cb_param 0x58E0 #define HIVE_SIZE_sp_sem_for_writing_cb_param 20 -/* function sp_start_isp_entry: 453 */ +/* function pixelgen_tpg_is_done: F07 */ + +/* function ia_css_isys_stream_capture_indication: 60D7 */ + +/* function sp_start_isp_entry: 392 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifdef HIVE_ADDR_sp_start_isp_entry #endif -#define HIVE_ADDR_sp_start_isp_entry 0x453 +#define HIVE_ADDR_sp_start_isp_entry 0x392 #endif -#define HIVE_ADDR_sp_sp_start_isp_entry 0x453 +#define HIVE_ADDR_sp_sp_start_isp_entry 0x392 + +/* function ia_css_tagger_buf_sp_unmark_all: 35DA */ -/* function ia_css_tagger_buf_sp_unmark_all: 2D30 */ +/* function ia_css_tagger_buf_sp_unmark_from_start: 361B */ -/* function ia_css_tagger_buf_sp_unmark_from_start: 2D71 */ +/* function ia_css_dmaproxy_sp_channel_acquire: 3F4C */ -/* function ia_css_dmaproxy_sp_channel_acquire: 36C0 */ +/* function ia_css_rmgr_sp_add_num_vbuf: 6652 */ -/* function ia_css_rmgr_sp_add_num_vbuf: 6608 */ +/* function ibuf_ctrl_config: D85 */ -/* function ia_css_isys_sp_token_map_create: 6218 */ +/* function ia_css_isys_stream_stop: 61F4 */ -/* function __ia_css_dmaproxy_sp_wait_for_ack_text: 337B */ +/* function __ia_css_dmaproxy_sp_wait_for_ack_text: 3C07 */ -/* function ia_css_tagger_sp_acquire_buf_elem: 2044 */ +/* function ia_css_tagger_sp_acquire_buf_elem: 28EE */ -/* function ia_css_bufq_sp_is_dynamic_buffer: 3227 */ +/* function ia_css_bufq_sp_is_dynamic_buffer: 3AB3 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_group #define HIVE_MEM_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_group 0x4228 -#define HIVE_SIZE_sp_group 1184 +#define HIVE_ADDR_sp_group 0x3F60 +#define HIVE_SIZE_sp_group 6296 #else #endif #endif #define HIVE_MEM_sp_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_group 0x4228 -#define HIVE_SIZE_sp_sp_group 1184 +#define HIVE_ADDR_sp_sp_group 0x3F60 +#define HIVE_SIZE_sp_sp_group 6296 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_event_proxy_thread #define HIVE_MEM_sp_event_proxy_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_proxy_thread 0x49B0 +#define HIVE_ADDR_sp_event_proxy_thread 0x5AE0 #define HIVE_SIZE_sp_event_proxy_thread 72 #else #endif #endif #define HIVE_MEM_sp_sp_event_proxy_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_event_proxy_thread 0x49B0 +#define HIVE_ADDR_sp_sp_event_proxy_thread 0x5AE0 #define HIVE_SIZE_sp_sp_event_proxy_thread 72 -/* function ia_css_thread_sp_kill: CCB */ +/* function ia_css_thread_sp_kill: 12E8 */ -/* function ia_css_tagger_sp_create: 2A51 */ +/* function ia_css_tagger_sp_create: 32FB */ -/* function tmpmem_acquire_dmem: 66B5 */ +/* function tmpmem_acquire_dmem: 66FF */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_MMU_BASE @@ -1077,41 +1143,31 @@ #define HIVE_ADDR_sp_MMU_BASE 0x24 #define HIVE_SIZE_sp_MMU_BASE 8 -/* function ia_css_dmaproxy_sp_channel_release: 36AC */ +/* function ia_css_dmaproxy_sp_channel_release: 3F38 */ -/* function ia_css_dmaproxy_sp_is_idle: 368C */ +/* function pixelgen_prbs_run: E7B */ + +/* function ia_css_dmaproxy_sp_is_idle: 3F18 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_qos_start #define HIVE_MEM_sem_for_qos_start scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_qos_start 0x47C4 +#define HIVE_ADDR_sem_for_qos_start 0x58F4 #define HIVE_SIZE_sem_for_qos_start 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_qos_start scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_qos_start 0x47C4 +#define HIVE_ADDR_sp_sem_for_qos_start 0x58F4 #define HIVE_SIZE_sp_sem_for_qos_start 20 -/* function isp_hmem_load: B4F */ +/* function isp_hmem_load: B5D */ -/* function ia_css_tagger_sp_release_buf_elem: 2020 */ +/* function ia_css_tagger_sp_release_buf_elem: 28CA */ -/* function ia_css_eventq_sp_send: 3702 */ +/* function ia_css_eventq_sp_send: 3F8E */ -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_isys_sp_error_cnt -#define HIVE_MEM_ia_css_isys_sp_error_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_isys_sp_error_cnt 0x6330 -#define HIVE_SIZE_ia_css_isys_sp_error_cnt 16 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_isys_sp_error_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_isys_sp_error_cnt 0x6330 -#define HIVE_SIZE_sp_ia_css_isys_sp_error_cnt 16 - -/* function ia_css_tagger_buf_sp_unlock_from_start: 2C60 */ +/* function ia_css_tagger_buf_sp_unlock_from_start: 350A */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_debug_buffer_ddr_address @@ -1125,37 +1181,39 @@ #define HIVE_ADDR_sp_debug_buffer_ddr_address 0xBC #define HIVE_SIZE_sp_debug_buffer_ddr_address 4 -/* function sp_isys_copy_request: 6A8 */ +/* function sp_isys_copy_request: 681 */ + +/* function ia_css_rmgr_sp_refcount_retain_vbuf: 64E2 */ -/* function ia_css_rmgr_sp_refcount_retain_vbuf: 6498 */ +/* function ia_css_thread_sp_set_priority: 12E0 */ -/* function ia_css_thread_sp_set_priority: CC3 */ +/* function sizeof_hmem: C04 */ -/* function sizeof_hmem: BF6 */ +/* function input_system_channel_open: 11BC */ -/* function tmpmem_release_dmem: 66A4 */ +/* function pixelgen_tpg_stop: EF5 */ -/* function cnd_input_system_cfg: 392 */ +/* function tmpmem_release_dmem: 66EE */ -/* function __ia_css_sp_rawcopy_func_critical: 70C2 */ +/* function __ia_css_dmaproxy_sp_process_text: 3BAB */ -/* function __ia_css_dmaproxy_sp_process_text: 331F */ +/* function ia_css_dmaproxy_sp_set_width_exception: 3D9D */ -/* function ia_css_dmaproxy_sp_set_width_exception: 3511 */ +/* function sp_event_assert: 8BD */ -/* function sp_event_assert: 845 */ +/* function ia_css_flash_sp_init_internal_params: 36D7 */ -/* function ia_css_flash_sp_init_internal_params: 2E4B */ +/* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 3410 */ -/* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 2B66 */ +/* function __modu: 6A78 */ -/* function __modu: 6A2E */ +/* function ia_css_dmaproxy_sp_init_isp_vector: 3C0D */ -/* function ia_css_dmaproxy_sp_init_isp_vector: 3381 */ +/* function input_system_channel_transfer: 11A5 */ /* function isp_vamem_store: 0 */ -/* function ia_css_tagger_sp_set_copy_pipe: 2A48 */ +/* function ia_css_tagger_sp_set_copy_pipe: 32F2 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_GDC_BASE @@ -1169,61 +1227,61 @@ #define HIVE_ADDR_sp_GDC_BASE 0x44 #define HIVE_SIZE_sp_GDC_BASE 8 -/* function ia_css_queue_local_init: 4E85 */ +/* function ia_css_queue_local_init: 5707 */ -/* function sp_event_proxy_callout_func: 6AFB */ +/* function sp_event_proxy_callout_func: 6B45 */ -/* function qos_scheduler_schedule_stage: 670F */ +/* function qos_scheduler_schedule_stage: 6759 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_thread_sp_num_ready_threads #define HIVE_MEM_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x4A40 +#define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x5B28 #define HIVE_SIZE_ia_css_thread_sp_num_ready_threads 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x4A40 +#define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x5B28 #define HIVE_SIZE_sp_ia_css_thread_sp_num_ready_threads 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_threads_stack_size #define HIVE_MEM_sp_threads_stack_size scalar_processor_2400_dmem -#define HIVE_ADDR_sp_threads_stack_size 0x180 -#define HIVE_SIZE_sp_threads_stack_size 28 +#define HIVE_ADDR_sp_threads_stack_size 0x17C +#define HIVE_SIZE_sp_threads_stack_size 24 #else #endif #endif #define HIVE_MEM_sp_sp_threads_stack_size scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_threads_stack_size 0x180 -#define HIVE_SIZE_sp_sp_threads_stack_size 28 +#define HIVE_ADDR_sp_sp_threads_stack_size 0x17C +#define HIVE_SIZE_sp_sp_threads_stack_size 24 -/* function ia_css_ispctrl_sp_isp_done_row_striping: 418B */ +/* function ia_css_ispctrl_sp_isp_done_row_striping: 4A0D */ -/* function __ia_css_isys_sp_isr_text: 5F5D */ +/* function __ia_css_virtual_isys_sp_isr_text: 5F4E */ -/* function ia_css_queue_dequeue: 4D03 */ +/* function ia_css_queue_dequeue: 5585 */ -/* function is_qos_standalone_mode: 66EA */ +/* function is_qos_standalone_mode: 6734 */ -/* function ia_css_dmaproxy_sp_configure_channel: 6F90 */ +/* function ia_css_dmaproxy_sp_configure_channel: 703C */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_current_thread_fiber_sp #define HIVE_MEM_current_thread_fiber_sp scalar_processor_2400_dmem -#define HIVE_ADDR_current_thread_fiber_sp 0x4A44 +#define HIVE_ADDR_current_thread_fiber_sp 0x5B2C #define HIVE_SIZE_current_thread_fiber_sp 4 #else #endif #endif #define HIVE_MEM_sp_current_thread_fiber_sp scalar_processor_2400_dmem -#define HIVE_ADDR_sp_current_thread_fiber_sp 0x4A44 +#define HIVE_ADDR_sp_current_thread_fiber_sp 0x5B2C #define HIVE_SIZE_sp_current_thread_fiber_sp 4 -/* function ia_css_circbuf_pop: FCD */ +/* function ia_css_circbuf_pop: 15EA */ -/* function memset: 6AAD */ +/* function memset: 6AF7 */ /* function irq_raise_set_token: B6 */ @@ -1239,169 +1297,165 @@ #define HIVE_ADDR_sp_GPIO_BASE 0x3C #define HIVE_SIZE_sp_GPIO_BASE 4 -/* function ia_css_pipeline_acc_stage_enable: 1818 */ +/* function pixelgen_prbs_stop: E69 */ -/* function ia_css_tagger_sp_unlock_exp_id: 2091 */ +/* function ia_css_pipeline_acc_stage_enable: 1F69 */ + +/* function ia_css_tagger_sp_unlock_exp_id: 293B */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_ph #define HIVE_MEM_isp_ph scalar_processor_2400_dmem -#define HIVE_ADDR_isp_ph 0x6340 +#define HIVE_ADDR_isp_ph 0x740C #define HIVE_SIZE_isp_ph 28 #else #endif #endif #define HIVE_MEM_sp_isp_ph scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_ph 0x6340 +#define HIVE_ADDR_sp_isp_ph 0x740C #define HIVE_SIZE_sp_isp_ph 28 -/* function ia_css_isys_sp_token_map_flush: 615D */ - -/* function ia_css_ispctrl_sp_init_ds: 39FA */ +/* function ia_css_ispctrl_sp_init_ds: 4286 */ -/* function get_xmem_base_addr_raw: 3DB3 */ +/* function get_xmem_base_addr_raw: 4635 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cbs_param #define HIVE_MEM_sp_all_cbs_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_param 0x47D8 +#define HIVE_ADDR_sp_all_cbs_param 0x5908 #define HIVE_SIZE_sp_all_cbs_param 16 #else #endif #endif #define HIVE_MEM_sp_sp_all_cbs_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_param 0x47D8 +#define HIVE_ADDR_sp_sp_all_cbs_param 0x5908 #define HIVE_SIZE_sp_sp_all_cbs_param 16 -/* function ia_css_circbuf_create: 101B */ +/* function pixelgen_tpg_config: F2A */ + +/* function ia_css_circbuf_create: 1638 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_sp_group #define HIVE_MEM_sem_for_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp_group 0x47E8 +#define HIVE_ADDR_sem_for_sp_group 0x5918 #define HIVE_SIZE_sem_for_sp_group 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp_group 0x47E8 +#define HIVE_ADDR_sp_sem_for_sp_group 0x5918 #define HIVE_SIZE_sp_sem_for_sp_group 20 -/* function __ia_css_dmaproxy_sp_configure_channel_text: 34F0 */ +/* function csi_rx_frontend_run: C1C */ + +/* function __ia_css_dmaproxy_sp_configure_channel_text: 3D7C */ -/* function ia_css_framebuf_sp_wait_for_in_frame: 6633 */ +/* function ia_css_framebuf_sp_wait_for_in_frame: 667D */ -/* function ia_css_sp_rawcopy_tag_frame: 57C9 */ +/* function ia_css_isys_stream_open: 62A9 */ -/* function isp_hmem_clear: B1F */ +/* function ia_css_sp_rawcopy_tag_frame: 5E35 */ -/* function ia_css_framebuf_sp_release_in_frame: 6676 */ +/* function input_system_channel_configure: 11D8 */ -/* function ia_css_isys_sp_backend_snd_acquire_request: 5BB3 */ +/* function isp_hmem_clear: B2D */ -/* function ia_css_isys_sp_token_map_is_full: 5FE4 */ +/* function ia_css_framebuf_sp_release_in_frame: 66C0 */ -/* function input_system_acquisition_run: AF3 */ +/* function stream2mmio_config: E15 */ -/* function ia_css_ispctrl_sp_start_binary: 384C */ +/* function ia_css_ispctrl_sp_start_binary: 40D8 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs #define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x5950 +#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x6A38 #define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x5950 +#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x6A38 #define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 -/* function ia_css_eventq_sp_recv: 36D4 */ +/* function ia_css_eventq_sp_recv: 3F60 */ + +/* function csi_rx_frontend_config: C74 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_pool #define HIVE_MEM_isp_pool scalar_processor_2400_dmem -#define HIVE_ADDR_isp_pool 0x300 +#define HIVE_ADDR_isp_pool 0x388 #define HIVE_SIZE_isp_pool 4 #else #endif #endif #define HIVE_MEM_sp_isp_pool scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_pool 0x300 +#define HIVE_ADDR_sp_isp_pool 0x388 #define HIVE_SIZE_sp_isp_pool 4 -/* function ia_css_rmgr_sp_rel_gen: 6365 */ +/* function ia_css_rmgr_sp_rel_gen: 63AF */ -/* function ia_css_tagger_sp_unblock_clients: 2919 */ +/* function ia_css_tagger_sp_unblock_clients: 31C3 */ -/* function css_get_frame_processing_time_end: 2010 */ +/* function css_get_frame_processing_time_end: 28BA */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_event_any_pending_mask #define HIVE_MEM_event_any_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_event_any_pending_mask 0x318 +#define HIVE_ADDR_event_any_pending_mask 0x3A0 #define HIVE_SIZE_event_any_pending_mask 8 #else #endif #endif #define HIVE_MEM_sp_event_any_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_any_pending_mask 0x318 +#define HIVE_ADDR_sp_event_any_pending_mask 0x3A0 #define HIVE_SIZE_sp_event_any_pending_mask 8 -/* function ia_css_isys_sp_backend_push: 5B6A */ +/* function ia_css_pipeline_sp_get_pipe_io_status: 1A5A */ /* function sh_css_decode_tag_descr: 352 */ /* function debug_enqueue_isp: 27B */ -/* function qos_scheduler_update_stage_budget: 66F2 */ +/* function qos_scheduler_update_stage_budget: 673C */ -/* function ia_css_spctrl_sp_uninit: 5AA5 */ +/* function ia_css_spctrl_sp_uninit: 5EDD */ -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_HIVE_IF_SWITCH_CODE -#define HIVE_MEM_HIVE_IF_SWITCH_CODE scalar_processor_2400_dmem -#define HIVE_ADDR_HIVE_IF_SWITCH_CODE 0x1D8 -#define HIVE_SIZE_HIVE_IF_SWITCH_CODE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_HIVE_IF_SWITCH_CODE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_HIVE_IF_SWITCH_CODE 0x1D8 -#define HIVE_SIZE_sp_HIVE_IF_SWITCH_CODE 4 +/* function csi_rx_backend_run: C62 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs #define HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x5964 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x6A4C #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_dis_bufs 140 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x5964 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x6A4C #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_dis_bufs 140 -/* function ia_css_tagger_buf_sp_lock_from_start: 2C94 */ +/* function ia_css_tagger_buf_sp_lock_from_start: 353E */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_isp_idle #define HIVE_MEM_sem_for_isp_idle scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_isp_idle 0x47FC +#define HIVE_ADDR_sem_for_isp_idle 0x592C #define HIVE_SIZE_sem_for_isp_idle 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_isp_idle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_isp_idle 0x47FC +#define HIVE_ADDR_sp_sem_for_isp_idle 0x592C #define HIVE_SIZE_sp_sem_for_isp_idle 20 -/* function ia_css_dmaproxy_sp_write_byte_addr: 33DE */ +/* function ia_css_dmaproxy_sp_write_byte_addr: 3C6A */ -/* function ia_css_dmaproxy_sp_init: 3355 */ +/* function ia_css_dmaproxy_sp_init: 3BE1 */ -/* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 2F1D */ +/* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 37A9 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_VAMEM_BASE @@ -1415,49 +1469,49 @@ #define HIVE_ADDR_sp_ISP_VAMEM_BASE 0x14 #define HIVE_SIZE_sp_ISP_VAMEM_BASE 12 +/* function input_system_channel_sync: 6C10 */ + #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_rawcopy_sp_tagger #define HIVE_MEM_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x62F0 +#define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x73D8 #define HIVE_SIZE_ia_css_rawcopy_sp_tagger 24 #else #endif #endif #define HIVE_MEM_sp_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x62F0 +#define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x73D8 #define HIVE_SIZE_sp_ia_css_rawcopy_sp_tagger 24 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids #define HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x59F0 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x6AD8 #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_exp_ids 70 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x59F0 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x6AD8 #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_exp_ids 70 -/* function ia_css_queue_item_load: 4F77 */ - -/* function ia_css_spctrl_sp_get_state: 5A90 */ +/* function ia_css_queue_item_load: 57F9 */ -/* function ia_css_isys_sp_token_map_uninit: 617A */ +/* function ia_css_spctrl_sp_get_state: 5EC8 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_callout_sp_thread #define HIVE_MEM_callout_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_callout_sp_thread 0x1E0 +#define HIVE_ADDR_callout_sp_thread 0x278 #define HIVE_SIZE_callout_sp_thread 4 #else #endif #endif #define HIVE_MEM_sp_callout_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_callout_sp_thread 0x1E0 +#define HIVE_ADDR_sp_callout_sp_thread 0x278 #define HIVE_SIZE_sp_callout_sp_thread 4 -/* function thread_fiber_sp_init: E24 */ +/* function thread_fiber_sp_init: 1441 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_SP_PMEM_BASE @@ -1471,102 +1525,88 @@ #define HIVE_ADDR_sp_SP_PMEM_BASE 0x0 #define HIVE_SIZE_sp_SP_PMEM_BASE 4 -/* function ia_css_isys_sp_token_map_snd_acquire_req: 60EA */ - #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_isp_input_stream_format #define HIVE_MEM_sp_isp_input_stream_format scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_input_stream_format 0x4118 +#define HIVE_ADDR_sp_isp_input_stream_format 0x3E50 #define HIVE_SIZE_sp_isp_input_stream_format 20 #else #endif #endif #define HIVE_MEM_sp_sp_isp_input_stream_format scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_input_stream_format 0x4118 +#define HIVE_ADDR_sp_sp_isp_input_stream_format 0x3E50 #define HIVE_SIZE_sp_sp_isp_input_stream_format 20 -/* function __mod: 6A1A */ - -/* function ia_css_dmaproxy_sp_init_dmem_channel: 343F */ +/* function __mod: 6A64 */ -/* function ia_css_thread_sp_join: CF4 */ +/* function ia_css_dmaproxy_sp_init_dmem_channel: 3CCB */ -/* function ia_css_dmaproxy_sp_add_command: 7082 */ +/* function ia_css_thread_sp_join: 1311 */ -/* function ia_css_sp_metadata_thread_func: 5968 */ +/* function ia_css_dmaproxy_sp_add_command: 712E */ -/* function __sp_event_proxy_func_critical: 6AE8 */ +/* function ia_css_sp_metadata_thread_func: 5EC1 */ -/* function ia_css_sp_metadata_wait: 5A57 */ +/* function __sp_event_proxy_func_critical: 6B32 */ -/* function ia_css_circbuf_peek_from_start: EFD */ +/* function ia_css_pipeline_sp_wait_for_isys_stream_N: 6074 */ -/* function ia_css_event_sp_encode: 375F */ +/* function ia_css_sp_metadata_wait: 5EBA */ -/* function ia_css_thread_sp_run: D67 */ +/* function ia_css_circbuf_peek_from_start: 151A */ -/* function sp_isys_copy_func: 68A */ +/* function ia_css_event_sp_encode: 3FEB */ -/* function ia_css_isys_sp_backend_flush: 5BD3 */ +/* function ia_css_thread_sp_run: 1384 */ -/* function ia_css_isys_sp_backend_frame_exists: 5AEF */ +/* function sp_isys_copy_func: 5AC */ -/* function ia_css_sp_isp_param_init_isp_memories: 4A2A */ +/* function ia_css_sp_isp_param_init_isp_memories: 52AC */ -/* function register_isr: 83D */ +/* function register_isr: 8B5 */ /* function irq_raise: C8 */ -/* function ia_css_dmaproxy_sp_mmu_invalidate: 32E5 */ +/* function ia_css_dmaproxy_sp_mmu_invalidate: 3B71 */ -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_HIVE_IF_SRST_ADDRESS -#define HIVE_MEM_HIVE_IF_SRST_ADDRESS scalar_processor_2400_dmem -#define HIVE_ADDR_HIVE_IF_SRST_ADDRESS 0x1B8 -#define HIVE_SIZE_HIVE_IF_SRST_ADDRESS 16 -#else -#endif -#endif -#define HIVE_MEM_sp_HIVE_IF_SRST_ADDRESS scalar_processor_2400_dmem -#define HIVE_ADDR_sp_HIVE_IF_SRST_ADDRESS 0x1B8 -#define HIVE_SIZE_sp_HIVE_IF_SRST_ADDRESS 16 +/* function csi_rx_backend_disable: C2E */ -/* function pipeline_sp_initialize_stage: 195E */ +/* function pipeline_sp_initialize_stage: 20BF */ #ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_isys_sp_frontend_states -#define HIVE_MEM_ia_css_isys_sp_frontend_states scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_isys_sp_frontend_states 0x6324 -#define HIVE_SIZE_ia_css_isys_sp_frontend_states 12 +#ifndef HIVE_MEM_N_CSI_RX_FE_CTRL_DLANES +#define HIVE_MEM_N_CSI_RX_FE_CTRL_DLANES scalar_processor_2400_dmem +#define HIVE_ADDR_N_CSI_RX_FE_CTRL_DLANES 0x1C4 +#define HIVE_SIZE_N_CSI_RX_FE_CTRL_DLANES 12 #else #endif #endif -#define HIVE_MEM_sp_ia_css_isys_sp_frontend_states scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_isys_sp_frontend_states 0x6324 -#define HIVE_SIZE_sp_ia_css_isys_sp_frontend_states 12 +#define HIVE_MEM_sp_N_CSI_RX_FE_CTRL_DLANES scalar_processor_2400_dmem +#define HIVE_ADDR_sp_N_CSI_RX_FE_CTRL_DLANES 0x1C4 +#define HIVE_SIZE_sp_N_CSI_RX_FE_CTRL_DLANES 12 + +/* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 700E */ -/* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 6F62 */ +/* function ia_css_ispctrl_sp_done_ds: 426D */ -/* function ia_css_ispctrl_sp_done_ds: 39E1 */ +/* function csi_rx_backend_config: C85 */ -/* function ia_css_sp_isp_param_get_mem_inits: 4A05 */ +/* function ia_css_sp_isp_param_get_mem_inits: 5287 */ -/* function ia_css_parambuf_sp_init_buffer_queues: 13F1 */ +/* function ia_css_parambuf_sp_init_buffer_queues: 1A27 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_pfp_spref #define HIVE_MEM_vbuf_pfp_spref scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_pfp_spref 0x308 +#define HIVE_ADDR_vbuf_pfp_spref 0x390 #define HIVE_SIZE_vbuf_pfp_spref 4 #else #endif #endif #define HIVE_MEM_sp_vbuf_pfp_spref scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_pfp_spref 0x308 +#define HIVE_ADDR_sp_vbuf_pfp_spref 0x390 #define HIVE_SIZE_sp_vbuf_pfp_spref 4 -/* function input_system_cfg: AB5 */ - #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_HMEM_BASE #define HIVE_MEM_ISP_HMEM_BASE scalar_processor_2400_dmem @@ -1582,260 +1622,266 @@ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_frames #define HIVE_MEM_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x5A38 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x6B20 #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_frames 280 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x5A38 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x6B20 #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_frames 280 -/* function qos_scheduler_init_stage_budget: 6750 */ - -/* function ia_css_isys_sp_backend_release: 5C48 */ - -/* function ia_css_isys_sp_backend_destroy: 5C72 */ +/* function qos_scheduler_init_stage_budget: 679A */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp2host_buffer_queue_handle #define HIVE_MEM_sp2host_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_buffer_queue_handle 0x5B50 +#define HIVE_ADDR_sp2host_buffer_queue_handle 0x6C38 #define HIVE_SIZE_sp2host_buffer_queue_handle 96 #else #endif #endif #define HIVE_MEM_sp_sp2host_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x5B50 +#define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x6C38 #define HIVE_SIZE_sp_sp2host_buffer_queue_handle 96 -/* function ia_css_isys_sp_token_map_check_mipi_frame_size: 60AE */ +/* function ia_css_ispctrl_sp_init_isp_vars: 4F79 */ -/* function ia_css_ispctrl_sp_init_isp_vars: 46F7 */ +/* function ia_css_isys_stream_start: 6187 */ -/* function ia_css_isys_sp_frontend_has_empty_mipi_buffer_cb: 5CC4 */ +/* function sp_warning: 8E8 */ -/* function sp_warning: 870 */ +/* function ia_css_rmgr_sp_vbuf_enqueue: 64A2 */ -/* function ia_css_rmgr_sp_vbuf_enqueue: 6458 */ +/* function ia_css_tagger_sp_tag_exp_id: 2A55 */ -/* function ia_css_tagger_sp_tag_exp_id: 21AB */ +/* function ia_css_pipeline_sp_sfi_release_current_frame: 273C */ -/* function ia_css_dmaproxy_sp_write: 33F5 */ +/* function ia_css_dmaproxy_sp_write: 3C81 */ -/* function ia_css_parambuf_sp_release_in_param: 1245 */ +/* function ia_css_isys_stream_start_async: 6250 */ + +/* function ia_css_parambuf_sp_release_in_param: 187B */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_irq_sw_interrupt_token #define HIVE_MEM_irq_sw_interrupt_token scalar_processor_2400_dmem -#define HIVE_ADDR_irq_sw_interrupt_token 0x4114 +#define HIVE_ADDR_irq_sw_interrupt_token 0x3E4C #define HIVE_SIZE_irq_sw_interrupt_token 4 #else #endif #endif #define HIVE_MEM_sp_irq_sw_interrupt_token scalar_processor_2400_dmem -#define HIVE_ADDR_sp_irq_sw_interrupt_token 0x4114 +#define HIVE_ADDR_sp_irq_sw_interrupt_token 0x3E4C #define HIVE_SIZE_sp_irq_sw_interrupt_token 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_isp_addresses #define HIVE_MEM_sp_isp_addresses scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_addresses 0x5FA4 +#define HIVE_ADDR_sp_isp_addresses 0x708C #define HIVE_SIZE_sp_isp_addresses 172 #else #endif #endif #define HIVE_MEM_sp_sp_isp_addresses scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_addresses 0x5FA4 +#define HIVE_ADDR_sp_sp_isp_addresses 0x708C #define HIVE_SIZE_sp_sp_isp_addresses 172 -/* function ia_css_rmgr_sp_acq_gen: 637D */ +/* function ia_css_rmgr_sp_acq_gen: 63C7 */ -/* function receiver_reg_load: ACA */ +/* function input_system_input_port_open: 10E7 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isps #define HIVE_MEM_isps scalar_processor_2400_dmem -#define HIVE_ADDR_isps 0x635C +#define HIVE_ADDR_isps 0x7428 #define HIVE_SIZE_isps 28 #else #endif #endif #define HIVE_MEM_sp_isps scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isps 0x635C +#define HIVE_ADDR_sp_isps 0x7428 #define HIVE_SIZE_sp_isps 28 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host_sp_queues_initialized #define HIVE_MEM_host_sp_queues_initialized scalar_processor_2400_dmem -#define HIVE_ADDR_host_sp_queues_initialized 0x412C +#define HIVE_ADDR_host_sp_queues_initialized 0x3E64 #define HIVE_SIZE_host_sp_queues_initialized 4 #else #endif #endif #define HIVE_MEM_sp_host_sp_queues_initialized scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host_sp_queues_initialized 0x412C +#define HIVE_ADDR_sp_host_sp_queues_initialized 0x3E64 #define HIVE_SIZE_sp_host_sp_queues_initialized 4 -/* function ia_css_queue_uninit: 4E43 */ +/* function ia_css_queue_uninit: 56C5 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_ispctrl_sp_isp_started #define HIVE_MEM_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x5C58 +#define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x6D40 #define HIVE_SIZE_ia_css_ispctrl_sp_isp_started 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x5C58 +#define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x6D40 #define HIVE_SIZE_sp_ia_css_ispctrl_sp_isp_started 4 -/* function ia_css_bufq_sp_release_dynamic_buf: 2F89 */ +/* function ia_css_bufq_sp_release_dynamic_buf: 3815 */ + +/* function ia_css_dmaproxy_sp_set_height_exception: 3D8E */ -/* function ia_css_dmaproxy_sp_set_height_exception: 3502 */ +/* function ia_css_dmaproxy_sp_init_vmem_channel: 3CFF */ -/* function ia_css_dmaproxy_sp_init_vmem_channel: 3473 */ +/* function csi_rx_backend_stop: C51 */ -/* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 33C7 */ +/* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 3C53 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_spref #define HIVE_MEM_vbuf_spref scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_spref 0x304 +#define HIVE_ADDR_vbuf_spref 0x38C #define HIVE_SIZE_vbuf_spref 4 #else #endif #endif #define HIVE_MEM_sp_vbuf_spref scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_spref 0x304 +#define HIVE_ADDR_sp_vbuf_spref 0x38C #define HIVE_SIZE_sp_vbuf_spref 4 -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_metadata_thread -#define HIVE_MEM_sp_metadata_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_metadata_thread 0x49F8 -#define HIVE_SIZE_sp_metadata_thread 72 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_metadata_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_metadata_thread 0x49F8 -#define HIVE_SIZE_sp_sp_metadata_thread 72 - -/* function ia_css_queue_enqueue: 4D8D */ +/* function ia_css_queue_enqueue: 560F */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_flash_sp_request #define HIVE_MEM_ia_css_flash_sp_request scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_request 0x4AF4 +#define HIVE_ADDR_ia_css_flash_sp_request 0x5BDC #define HIVE_SIZE_ia_css_flash_sp_request 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_flash_sp_request scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_request 0x4AF4 +#define HIVE_ADDR_sp_ia_css_flash_sp_request 0x5BDC #define HIVE_SIZE_sp_ia_css_flash_sp_request 4 -/* function ia_css_dmaproxy_sp_vmem_write: 3398 */ +/* function ia_css_dmaproxy_sp_vmem_write: 3C24 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_tagger_frames #define HIVE_MEM_tagger_frames scalar_processor_2400_dmem -#define HIVE_ADDR_tagger_frames 0x4A48 +#define HIVE_ADDR_tagger_frames 0x5B30 #define HIVE_SIZE_tagger_frames 168 #else #endif #endif #define HIVE_MEM_sp_tagger_frames scalar_processor_2400_dmem -#define HIVE_ADDR_sp_tagger_frames 0x4A48 +#define HIVE_ADDR_sp_tagger_frames 0x5B30 #define HIVE_SIZE_sp_tagger_frames 168 -/* function ia_css_isys_sp_token_map_snd_capture_req: 610C */ - #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_reading_if #define HIVE_MEM_sem_for_reading_if scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_if 0x4810 +#define HIVE_ADDR_sem_for_reading_if 0x5940 #define HIVE_SIZE_sem_for_reading_if 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_reading_if scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_if 0x4810 +#define HIVE_ADDR_sp_sem_for_reading_if 0x5940 #define HIVE_SIZE_sp_sem_for_reading_if 20 -/* function sp_generate_interrupts: 8EF */ +/* function sp_generate_interrupts: 967 */ + +/* function ia_css_pipeline_sp_start: 1FC2 */ -/* function ia_css_pipeline_sp_start: 1871 */ +/* function ia_css_thread_default_callout: 6C8F */ -/* function ia_css_thread_default_callout: 6BE3 */ +/* function csi_rx_backend_enable: C3F */ -/* function ia_css_sp_rawcopy_init: 536A */ +/* function ia_css_sp_rawcopy_init: 5B32 */ -/* function tmr_clock_read: 1412 */ +/* function input_system_input_port_configure: 1139 */ + +/* function tmr_clock_read: 1665 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_BAMEM_BASE #define HIVE_MEM_ISP_BAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_BAMEM_BASE 0x310 +#define HIVE_ADDR_ISP_BAMEM_BASE 0x398 #define HIVE_SIZE_ISP_BAMEM_BASE 4 #else #endif #endif #define HIVE_MEM_sp_ISP_BAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x310 +#define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x398 #define HIVE_SIZE_sp_ISP_BAMEM_BASE 4 -/* function ia_css_isys_sp_frontend_rcv_capture_ack: 5D73 */ - #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues #define HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5BB0 +#define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6C98 #define HIVE_SIZE_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5BB0 +#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6C98 #define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 -/* function css_get_frame_processing_time_start: 2018 */ +/* function isys2401_dma_config_legacy: DDA */ + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ibuf_ctrl_master_ports +#define HIVE_MEM_ibuf_ctrl_master_ports scalar_processor_2400_dmem +#define HIVE_ADDR_ibuf_ctrl_master_ports 0x208 +#define HIVE_SIZE_ibuf_ctrl_master_ports 12 +#else +#endif +#endif +#define HIVE_MEM_sp_ibuf_ctrl_master_ports scalar_processor_2400_dmem +#define HIVE_ADDR_sp_ibuf_ctrl_master_ports 0x208 +#define HIVE_SIZE_sp_ibuf_ctrl_master_ports 12 + +/* function css_get_frame_processing_time_start: 28C2 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cbs_frame #define HIVE_MEM_sp_all_cbs_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_frame 0x4824 +#define HIVE_ADDR_sp_all_cbs_frame 0x5954 #define HIVE_SIZE_sp_all_cbs_frame 16 #else #endif #endif #define HIVE_MEM_sp_sp_all_cbs_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_frame 0x4824 +#define HIVE_ADDR_sp_sp_all_cbs_frame 0x5954 #define HIVE_SIZE_sp_sp_all_cbs_frame 16 -/* function thread_sp_queue_print: D84 */ +/* function ia_css_virtual_isys_sp_isr: 716E */ + +/* function thread_sp_queue_print: 13A1 */ -/* function sp_notify_eof: 89B */ +/* function sp_notify_eof: 913 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_str2mem #define HIVE_MEM_sem_for_str2mem scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_str2mem 0x4834 +#define HIVE_ADDR_sem_for_str2mem 0x5964 #define HIVE_SIZE_sem_for_str2mem 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_str2mem scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_str2mem 0x4834 +#define HIVE_ADDR_sp_sem_for_str2mem 0x5964 #define HIVE_SIZE_sp_sem_for_str2mem 20 -/* function ia_css_tagger_buf_sp_is_marked_from_start: 2CFC */ +/* function ia_css_tagger_buf_sp_is_marked_from_start: 35A6 */ -/* function ia_css_bufq_sp_acquire_dynamic_buf: 3141 */ +/* function ia_css_bufq_sp_acquire_dynamic_buf: 39CD */ -/* function ia_css_circbuf_destroy: 1012 */ +/* function ia_css_pipeline_sp_sfi_mode_is_enabled: 2890 */ + +/* function ia_css_circbuf_destroy: 162F */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_PMEM_BASE @@ -1849,43 +1895,41 @@ #define HIVE_ADDR_sp_ISP_PMEM_BASE 0xC #define HIVE_SIZE_sp_ISP_PMEM_BASE 4 -/* function ia_css_sp_isp_param_mem_load: 4998 */ - -/* function ia_css_tagger_buf_sp_pop_from_start: 2AE8 */ +/* function ia_css_sp_isp_param_mem_load: 521A */ -/* function __div: 69D2 */ +/* function ia_css_tagger_buf_sp_pop_from_start: 3392 */ -/* function ia_css_isys_sp_frontend_create: 5F44 */ +/* function __div: 6A1C */ -/* function ia_css_rmgr_sp_refcount_release_vbuf: 6477 */ +/* function ia_css_rmgr_sp_refcount_release_vbuf: 64C1 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_flash_sp_in_use #define HIVE_MEM_ia_css_flash_sp_in_use scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_in_use 0x4AF8 +#define HIVE_ADDR_ia_css_flash_sp_in_use 0x5BE0 #define HIVE_SIZE_ia_css_flash_sp_in_use 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_flash_sp_in_use scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x4AF8 +#define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x5BE0 #define HIVE_SIZE_sp_ia_css_flash_sp_in_use 4 -/* function ia_css_thread_sem_sp_wait: 6CB7 */ +/* function ia_css_thread_sem_sp_wait: 6D63 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_sleep_mode #define HIVE_MEM_sp_sleep_mode scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sleep_mode 0x4130 +#define HIVE_ADDR_sp_sleep_mode 0x3E68 #define HIVE_SIZE_sp_sleep_mode 4 #else #endif #endif #define HIVE_MEM_sp_sp_sleep_mode scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_sleep_mode 0x4130 +#define HIVE_ADDR_sp_sp_sleep_mode 0x3E68 #define HIVE_SIZE_sp_sp_sleep_mode 4 -/* function ia_css_tagger_buf_sp_push: 2BF7 */ +/* function ia_css_tagger_buf_sp_push: 34A1 */ /* function mmu_invalidate_cache: D3 */ @@ -1901,19 +1945,21 @@ #define HIVE_ADDR_sp_sp_max_cb_elems 0x148 #define HIVE_SIZE_sp_sp_max_cb_elems 8 -/* function ia_css_queue_remote_init: 4E65 */ +/* function ia_css_queue_remote_init: 56E7 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_stop_req #define HIVE_MEM_isp_stop_req scalar_processor_2400_dmem -#define HIVE_ADDR_isp_stop_req 0x46C8 +#define HIVE_ADDR_isp_stop_req 0x57F8 #define HIVE_SIZE_isp_stop_req 4 #else #endif #endif #define HIVE_MEM_sp_isp_stop_req scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_stop_req 0x46C8 +#define HIVE_ADDR_sp_isp_stop_req 0x57F8 #define HIVE_SIZE_sp_isp_stop_req 4 +/* function ia_css_pipeline_sp_sfi_request_next_frame: 2752 */ + #endif /* _sp_map_h_ */