From: Paul Brook Date: Wed, 29 Nov 2006 16:26:56 +0000 (+0000) Subject: 2006-11-29 Paul Brook X-Git-Tag: drow-reverse-20070409-branchpoint~1189 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=00249aaae7d7cb22e216966cea456be188810cdf;p=external%2Fbinutils.git 2006-11-29 Paul Brook gas/ * config/tc-arm.c (do_vfp_sp_const, do_vfp_dp_const): Fix operans encoding. gas/testsuite/ * gas/arm/vfpv3-const-conv.s: Improve test coverage. * gas/arm/vfpv3-const-conv.d: Adjust expected output. * gas/arm/vfp-neon-syntax_t2.d: Ditto. * gas/arm/vfp-neon-syntax.d: Ditto. opcodes/ * arm-dis.c (coprocessor_opcodes): Fix bitfields for fconstd/fconstd. --- diff --git a/gas/ChangeLog b/gas/ChangeLog index 5a87bd4..e21af06 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2006-11-29 Paul Brook + + * config/tc-arm.c (do_vfp_sp_const, do_vfp_dp_const): Fix operans + encoding. + 2006-11-27 Sterling Augustine * config/tc-xtensa.c (xtensa_sanity_check): Check for RELAX_IMMED diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index f7a3e74..7f3751d 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -7719,16 +7719,16 @@ static void do_vfp_sp_const (void) { encode_arm_vfp_reg (inst.operands[0].reg, VFP_REG_Sd); - inst.instruction |= (inst.operands[1].imm & 15) << 16; - inst.instruction |= (inst.operands[1].imm >> 4); + inst.instruction |= (inst.operands[1].imm & 0xf0) << 12; + inst.instruction |= (inst.operands[1].imm & 0x0f); } static void do_vfp_dp_const (void) { encode_arm_vfp_reg (inst.operands[0].reg, VFP_REG_Dd); - inst.instruction |= (inst.operands[1].imm & 15) << 16; - inst.instruction |= (inst.operands[1].imm >> 4); + inst.instruction |= (inst.operands[1].imm & 0xf0) << 12; + inst.instruction |= (inst.operands[1].imm & 0x0f); } static void diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index e3c14fc..ef83e7f 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2006-11-29 Paul Brook + + * gas/arm/vfpv3-const-conv.s: Improve test coverage. + * gas/arm/vfpv3-const-conv.d: Adjust expected output. + * gas/arm/vfp-neon-syntax_t2.d: Ditto. + * gas/arm/vfp-neon-syntax.d: Ditto. + 2006-11-27 Bob Wilson * gas/elf/section2.e-xtensa: New file. diff --git a/gas/testsuite/gas/arm/vfp-neon-syntax.d b/gas/testsuite/gas/arm/vfp-neon-syntax.d index 22620ad..8d97435 100644 --- a/gas/testsuite/gas/arm/vfp-neon-syntax.d +++ b/gas/testsuite/gas/arm/vfp-neon-syntax.d @@ -7,16 +7,16 @@ Disassembly of section .text: 0[0-9a-f]+ <[^>]+> eeb00a60 fcpys s0, s1 0[0-9a-f]+ <[^>]+> eeb00b41 fcpyd d0, d1 -0[0-9a-f]+ <[^>]+> eeb00a05 fconsts s0, #80 -0[0-9a-f]+ <[^>]+> eeb00b07 fconstd d0, #112 +0[0-9a-f]+ <[^>]+> eeb50a00 fconsts s0, #80 +0[0-9a-f]+ <[^>]+> eeb70b00 fconstd d0, #112 0[0-9a-f]+ <[^>]+> ee100a90 fmrs r0, s1 0[0-9a-f]+ <[^>]+> ee001a10 fmsr s0, r1 0[0-9a-f]+ <[^>]+> ec510a11 fmrrs r0, r1, {s2, s3} 0[0-9a-f]+ <[^>]+> ec442a10 fmsrr {s0, s1}, r2, r4 0[0-9a-f]+ <[^>]+> 0eb00a60 fcpyseq s0, s1 0[0-9a-f]+ <[^>]+> 0eb00b41 fcpydeq d0, d1 -0[0-9a-f]+ <[^>]+> 0eb00a05 fconstseq s0, #80 -0[0-9a-f]+ <[^>]+> 0eb00b07 fconstdeq d0, #112 +0[0-9a-f]+ <[^>]+> 0eb50a00 fconstseq s0, #80 +0[0-9a-f]+ <[^>]+> 0eb70b00 fconstdeq d0, #112 0[0-9a-f]+ <[^>]+> 0e100a90 fmrseq r0, s1 0[0-9a-f]+ <[^>]+> 0e001a10 fmsreq s0, r1 0[0-9a-f]+ <[^>]+> 0c510a11 fmrrseq r0, r1, {s2, s3} diff --git a/gas/testsuite/gas/arm/vfp-neon-syntax_t2.d b/gas/testsuite/gas/arm/vfp-neon-syntax_t2.d index 49c2d2f..5c02235 100644 --- a/gas/testsuite/gas/arm/vfp-neon-syntax_t2.d +++ b/gas/testsuite/gas/arm/vfp-neon-syntax_t2.d @@ -7,8 +7,8 @@ Disassembly of section \.text: 0[0-9a-f]+ <[^>]+> eeb0 0a60 fcpys s0, s1 0[0-9a-f]+ <[^>]+> eeb0 0b41 fcpyd d0, d1 -0[0-9a-f]+ <[^>]+> eeb0 0a05 fconsts s0, #80 -0[0-9a-f]+ <[^>]+> eeb0 0b07 fconstd d0, #112 +0[0-9a-f]+ <[^>]+> eeb5 0a00 fconsts s0, #80 +0[0-9a-f]+ <[^>]+> eeb7 0b00 fconstd d0, #112 0[0-9a-f]+ <[^>]+> ee10 0a90 fmrs r0, s1 0[0-9a-f]+ <[^>]+> ee00 1a10 fmsr s0, r1 0[0-9a-f]+ <[^>]+> ec51 0a11 fmrrs r0, r1, {s2, s3} @@ -16,8 +16,8 @@ Disassembly of section \.text: 0[0-9a-f]+ <[^>]+> bf01 itttt eq 0[0-9a-f]+ <[^>]+> eeb0 0a60 fcpyseq s0, s1 0[0-9a-f]+ <[^>]+> eeb0 0b41 fcpydeq d0, d1 -0[0-9a-f]+ <[^>]+> eeb0 0a05 fconstseq s0, #80 -0[0-9a-f]+ <[^>]+> eeb0 0b07 fconstdeq d0, #112 +0[0-9a-f]+ <[^>]+> eeb5 0a00 fconstseq s0, #80 +0[0-9a-f]+ <[^>]+> eeb7 0b00 fconstdeq d0, #112 0[0-9a-f]+ <[^>]+> bf01 itttt eq 0[0-9a-f]+ <[^>]+> ee10 0a90 fmrseq r0, s1 0[0-9a-f]+ <[^>]+> ee00 1a10 fmsreq s0, r1 diff --git a/gas/testsuite/gas/arm/vfpv3-const-conv.d b/gas/testsuite/gas/arm/vfpv3-const-conv.d index ddabd1c..9515fef 100644 --- a/gas/testsuite/gas/arm/vfpv3-const-conv.d +++ b/gas/testsuite/gas/arm/vfpv3-const-conv.d @@ -5,12 +5,12 @@ .*: +file format .*arm.* Disassembly of section \.text: -0[0-9a-f]+ <[^>]+> eef48a00 fconsts s17, #4 -0[0-9a-f]+ <[^>]+> eeb59a00 fconsts s18, #5 -0[0-9a-f]+ <[^>]+> eef69a00 fconsts s19, #6 -0[0-9a-f]+ <[^>]+> eef41b00 fconstd d17, #4 -0[0-9a-f]+ <[^>]+> eef52b00 fconstd d18, #5 -0[0-9a-f]+ <[^>]+> eef63b00 fconstd d19, #6 +0[0-9a-f]+ <[^>]+> eef08a04 fconsts s17, #4 +0[0-9a-f]+ <[^>]+> eeba9a05 fconsts s18, #165 +0[0-9a-f]+ <[^>]+> eef49a00 fconsts s19, #64 +0[0-9a-f]+ <[^>]+> eef01b04 fconstd d17, #4 +0[0-9a-f]+ <[^>]+> eefa2b05 fconstd d18, #165 +0[0-9a-f]+ <[^>]+> eef43b00 fconstd d19, #64 0[0-9a-f]+ <[^>]+> eefa8a63 fshtos s17, #9 0[0-9a-f]+ <[^>]+> eefa1b63 fshtod d17, #9 0[0-9a-f]+ <[^>]+> eefa8aeb fsltos s17, #9 diff --git a/gas/testsuite/gas/arm/vfpv3-const-conv.s b/gas/testsuite/gas/arm/vfpv3-const-conv.s index c40301c..d726d14 100644 --- a/gas/testsuite/gas/arm/vfpv3-const-conv.s +++ b/gas/testsuite/gas/arm/vfpv3-const-conv.s @@ -1,11 +1,11 @@ .arm .syntax unified fconsts s17, #4 - fconsts s18, #5 - fconsts s19, #6 + fconsts s18, #0xa5 + fconsts s19, #0x40 fconstd d17, #4 - fconstd d18, #5 - fconstd d19, #6 + fconstd d18, #0xa5 + fconstd d19, #0x40 fshtos s17, 9 fshtod d17, 9 fsltos s17, 9 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 00b0aaf..f9a755a 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2006-11-29 Paul Brook + + * arm-dis.c (coprocessor_opcodes): Fix bitfields for fconstd/fconstd. + 2006-11-22 Daniel Jacobowitz * arm-dis.c (last_is_thumb): Delete. diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index c5342fa..49765d8 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -308,8 +308,8 @@ static const struct opcode32 coprocessor_opcodes[] = {FPU_VFP_EXT_V3, 0x0ebe0a40, 0x0fbe0f50, "fto%16?us%7?lhs%c\t%y1, #%5,0-3k"}, {FPU_VFP_EXT_V3, 0x0ebe0b40, 0x0fbe0f50, "fto%16?us%7?lhd%c\t%z1, #%5,0-3k"}, {FPU_VFP_EXT_V1, 0x0c500b10, 0x0fb00ff0, "fmrrd%c\t%12-15r, %16-19r, %z0"}, - {FPU_VFP_EXT_V3, 0x0eb00a00, 0x0fb00ff0, "fconsts%c\t%y1, #%16-19,0-3d"}, - {FPU_VFP_EXT_V3, 0x0eb00b00, 0x0fb00ff0, "fconstd%c\t%z1, #%16-19,0-3d"}, + {FPU_VFP_EXT_V3, 0x0eb00a00, 0x0fb00ff0, "fconsts%c\t%y1, #%0-3,16-19d"}, + {FPU_VFP_EXT_V3, 0x0eb00b00, 0x0fb00ff0, "fconstd%c\t%z1, #%0-3,16-19d"}, {FPU_VFP_EXT_V2, 0x0c400a10, 0x0ff00fd0, "fmsrr%c\t%y4, %12-15r, %16-19r"}, {FPU_VFP_EXT_V2, 0x0c400b10, 0x0ff00fd0, "fmdrr%c\t%z0, %12-15r, %16-19r"}, {FPU_VFP_EXT_V2, 0x0c500a10, 0x0ff00fd0, "fmrrs%c\t%12-15r, %16-19r, %y4"},