From: Linus Torvalds Date: Tue, 13 Dec 2022 21:46:07 +0000 (-0800) Subject: Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux X-Git-Tag: v6.6.17~5945 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=0015edd6f66172f93aa720192020138ca13ba0a6;p=platform%2Fkernel%2Flinux-rpi.git Merge tag 'clk-for-linus' of git://git./linux/kernel/git/clk/linux Pull clk driver updates from Stephen Boyd: "A pile of clk driver updates with a small tracepoint patch to the clk core this time around. The core framework is effectively unchanged, with the majority of the diff going to the Qualcomm clk driver directory because they added two 3k line files that are almost all clk data (Abel Vesa from Linaro tried to shrink the number of lines down, but it doesn't seem to be possible without sacrificing readability). The second big driver this time around is the Rockchip rk3588 clk and reset unit, at _only_ 2.5k lines. Ignoring the big clk drivers from the familiar SoC vendors, there's just a bunch of little clk driver updates and fixes throughout here. It's the usual set of clk data fixups to describe proper parents, or add frequencies to frequency tables, or plug memory leaks when function calls fail. Also, some drivers are converted to use modern clk_hw APIs, which is always nice to see. And data is deduplicated, leading to a smaller kernel Image. Overall this batch has a larger collection of cleanups than it typically does. Maybe that means there are less new SoCs right now that need supporting, and the focus has shifted to quality and reliability. I can dream. New Drivers: - Frequency hopping controller hardware on MediaTek MT8186 - Global clock controller for Qualcomm SM8550 - Display clock controller for Qualcomm SC8280XP - RPMh clock controller for Qualcomm QDU1000 and QRU1000 SoCs - CPU PLL on MStar/SigmaStar SoCs - Support for the clock and reset unit of the Rockchip rk3588 Updates: - Tracepoints for clk_rate_request structures - Debugfs support for fractional divider clk - Make MxL's CGU driver secure compatible - Ingenic JZ4755 SoC clk support - Support audio clks on X1000 SoCs - Remove flags from univ/main/syspll child fixed factor clocks across MediaTek platforms - Fix clock dependency for ADC on MediaTek MT7986 - Fix parent for FlexSPI clock for i.MX93 - Add USB suspend clock on i.MX8MP - Unmap anatop base on error for i.MX93 driver - Change enet clock parent to wakeup_axi_root for i.MX93 - Drop LPIT1, LPIT2, TPM1 and TPM3 clocks for i.MX93 - Mark HSIO bus clock and SYS_CNT clock as critical on i.MX93 - Add 320MHz and 640MHz entries to PLL146x - Add audio shared gate and SAI clocks for i.MX8MP - Fix a possible memory leak in the error path of rockchip PLL creation - Fix header guard for V3S clocks - Add IR module clock for f1c100s - Correct the parent clocks for the (High Speed) Serial Communication Interfaces with FIFO ((H)SCIF) modules and the mixed-up Ethernet Switch clocks on Renesas R-Car S4-8 - Add timer (TMU, CMT) and Cortex-A76 CPU core (Z0) clocks on Renesas R-Car V4H - Two PLL driver fixups for the Amlogic clk driver - Round SD clock rate to improve parent clock selection - Add Ethernet Switch and internal SASYNCPER clocks on Renesas R-Car S4-8 - Add DMA (SYS-DMAC), SPI (MSIOF), external interrupt (INTC-EX) serial (SCIF), PWM (PWM and TPU), SDHI, and HyperFLASH/QSPI (RPC-IF) clocks on Renesas R-Car V4H - Add Multi-Function Timer Pulse Unit (MTU3a) clock and reset on Renesas RZ/G2L - Fix endless loop on Renesas RZ/N1 - Correct the parent clocks for the High Speed Serial Communication Interfaces with FIFO (HSCIF) modules on the Renesas R-Car V4H SoC Note: HSCIF0 is used for the serial console on the White-Hawk development board - Various clk DT binding improvements and conversions to YAML - Qualcomm SM8150/SM8250 display clock controller cleaned up - Some missing clocks for Qualcomm SM8350 added - Qualcomm MSM8974 Global and Multimedia clock controllers transitioned to parent_data and parent_hws - Use parent_data and add network resets for Qualcomm IPQ8074 - Qualcomm Krait clock controller modernized - Fix pm_runtime usage in Qualcomm SC7180 and SC7280 LPASS clock controllers - Enable retention mode on Qualcomm SM8250 USB GDSCs - Cleanup Qualcomm RPM and RPMh clock drivers to avoid duplicating clocks which definition could be shared between platforms - Various NULL pointer checks added for allocations" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (188 commits) clk: nomadik: correct struct name kernel-doc warning clk: lmk04832: fix kernel-doc warnings clk: lmk04832: drop superfluous #include clk: lmk04832: drop unnecessary semicolons clk: lmk04832: declare variables as const when possible clk: socfpga: Fix memory leak in socfpga_gate_init() clk: microchip: enable the MPFS clk driver by default if SOC_MICROCHIP_POLARFIRE clk: st: Fix memory leak in st_of_quadfs_setup() clk: samsung: Fix memory leak in _samsung_clk_register_pll() clk: Add trace events for rate requests clk: Store clk_core for clk_rate_request clk: qcom: rpmh: add support for SM6350 rpmh IPA clock clk: qcom: mmcc-msm8974: use parent_hws/_data instead of parent_names clk: qcom: mmcc-msm8974: move clock parent tables down clk: qcom: mmcc-msm8974: use ARRAY_SIZE instead of specifying num_parents clk: qcom: gcc-msm8974: use parent_hws/_data instead of parent_names clk: qcom: gcc-msm8974: move clock parent tables down clk: qcom: gcc-msm8974: use ARRAY_SIZE instead of specifying num_parents dt-bindings: clocks: qcom,mmcc: define clocks/clock-names for MSM8974 dt-bindings: clock: split qcom,gcc-msm8974,-msm8226 to the separate file ... --- 0015edd6f66172f93aa720192020138ca13ba0a6