Replace prefix of struct name from 'pass' to 'hal_power' for consistency.
In general, when naming a structure in hal API, use hal_<api name> as a prefix.
Previously, in hal API power, 'pass' was used as a prefix
in the structure name instead of 'hal_power'.
Similarly, replace prefix of macro name from 'PASS' to 'HAL_POWER' for consistency.
Previously, in macros, 'PASS' was used instead of HAL_POWER as the prefix.
Change-Id: Iaab468e49dde514f1243b74c7d7a80409a37ec74
Signed-off-by: Unsung Lee <unsung.lee@samsung.com>
* @brief Structure for DVFS (Dynamic Volt. & Freq. Scaling) operations.
* @since HAL_MODULE_POWER 1.0
*/
-struct pass_resource_dvfs_ops {
+struct hal_power_resource_dvfs_ops {
int (*get_curr_governor)(char *res_name, char *governor); /**< Get the current governor */
int (*set_curr_governor)(char *res_name, char *governor); /**< Set the current governor */
int (*get_up_threshold)(char *res_name); /**< Get the up_threshold to support boosting */
int (*set_up_threshold)(char *res_name, int up_threshold); /**< Set the up_threshold to support boosting */
- int (*get_load_table)(char *name, void *pass_cpu_load_table); /**< Get the load_table of each resource to estimate the system load */
+ int (*get_load_table)(char *name, void *hal_power_cpu_load_table); /**< Get the load_table of each resource to estimate the system load */
};
/**
* @brief Structure for CPU hotplug operations.
* @since HAL_MODULE_POWER 1.0
*/
-struct pass_resource_hotplug_ops {
+struct hal_power_resource_hotplug_ops {
int (*get_online_state)(char *res_name, int cpu); /**< Get the online status of resource */
int (*set_online_state)(char *res_name, int cpu, int on); /**< Set the online status of resource */
int (*get_online_min_num) (char *res_name); /* Get the minimum number of online CPUs */
* @brief Structure for TMU (Thermal Management Unit) operations.
* @since HAL_MODULE_POWER 1.0
*/
-struct pass_resource_tmu_ops {
+struct hal_power_resource_tmu_ops {
int (*get_temp)(char *res_thermal_name); /**< Get the current temperature of resource */
int (*get_policy)(char *res_thermal_name, char *policy); /**< Get the policy of thermal management unit */
* @brief Structure for battery operations.
* @since HAL_MODULE_POWER 1.0
*/
-struct pass_resource_battery_ops {
+struct hal_power_resource_battery_ops {
int (*set_charging_status)(char *res_name, int state); /**< Set the state of battery charging */
int (*get_charging_status)(char *res_name); /**< Get the state of battery charging */
* @brief Structure for CPU H/W.
* @since HAL_MODULE_POWER 1.0
*/
-struct pass_resource_cpu {
- struct pass_resource_dvfs_ops dvfs; /**< Function lists for DVFS (Dynamic Volt. & Freq. Scaling) */
- struct pass_resource_tmu_ops tmu; /**< Function lists for function lists for the TMU (Thermal Management Unit) */
- struct pass_resource_hotplug_ops hotplug; /**< Function lists for the CPU on/off */
+struct hal_power_resource_cpu {
+ struct hal_power_resource_dvfs_ops dvfs; /**< Function lists for DVFS (Dynamic Volt. & Freq. Scaling) */
+ struct hal_power_resource_tmu_ops tmu; /**< Function lists for function lists for the TMU (Thermal Management Unit) */
+ struct hal_power_resource_hotplug_ops hotplug; /**< Function lists for the CPU on/off */
};
/**
* @brief Structure for Memory Bus H/W.
* @since HAL_MODULE_POWER 1.0
*/
-struct pass_resource_bus {
- struct pass_resource_dvfs_ops dvfs; /**< Function lists for DVFS (Dynamic Volt. & Freq. Scaling) */
- struct pass_resource_tmu_ops tmu; /**< Function lists for function lists for the TMU (Thermal Management Unit) */
+struct hal_power_resource_bus {
+ struct hal_power_resource_dvfs_ops dvfs; /**< Function lists for DVFS (Dynamic Volt. & Freq. Scaling) */
+ struct hal_power_resource_tmu_ops tmu; /**< Function lists for function lists for the TMU (Thermal Management Unit) */
};
* @brief Structure for GPU H/W.
* @since HAL_MODULE_POWER 1.0
*/
-struct pass_resource_gpu {
- struct pass_resource_dvfs_ops dvfs; /**< Function lists for DVFS (Dynamic Volt. & Freq. Scaling) */
- struct pass_resource_tmu_ops tmu; /**< Function lists for function lists for the TMU (Thermal Management Unit) */
+struct hal_power_resource_gpu {
+ struct hal_power_resource_dvfs_ops dvfs; /**< Function lists for DVFS (Dynamic Volt. & Freq. Scaling) */
+ struct hal_power_resource_tmu_ops tmu; /**< Function lists for function lists for the TMU (Thermal Management Unit) */
};
/**
* @brief Structure for Memory H/W.
* @since HAL_MODULE_POWER 1.0
*/
-struct pass_resource_memory {
+struct hal_power_resource_memory {
int (*get_fault_around_bytes)(char *res_name); /**< Get the /sys/kernel/debug/fault_around_bytes */
int (*set_fault_around_bytes)(char *res_name, int fault_around_bytes); /**< Set the /sys/kernel/debug/fault_around_bytes */
};
* @brief Structure for Battery H/W.
* @since HAL_MODULE_POWER 1.0
*/
-struct pass_resource_battery {
- struct pass_resource_tmu_ops tmu; /**< Function lists for thermal management unit */
- struct pass_resource_battery_ops battery; /**< Function lists for battery */
+struct hal_power_resource_battery {
+ struct hal_power_resource_tmu_ops tmu; /**< Function lists for thermal management unit */
+ struct hal_power_resource_battery_ops battery; /**< Function lists for battery */
};
/**
* @since HAL_MODULE_POWER 1.0
*/
typedef struct _hal_backend_power_funcs {
- struct pass_resource_cpu *cpu; /**< Function lists for CPU */
- struct pass_resource_bus *bus; /**< Function lists for bus */
- struct pass_resource_gpu *gpu; /**< Function lists for GPU */
- struct pass_resource_memory *memory; /**< Function lists for memory */
- struct pass_resource_battery *battery; /**< Function lists for battery */
+ struct hal_power_resource_cpu *cpu; /**< Function lists for CPU */
+ struct hal_power_resource_bus *bus; /**< Function lists for bus */
+ struct hal_power_resource_gpu *gpu; /**< Function lists for GPU */
+ struct hal_power_resource_memory *memory; /**< Function lists for memory */
+ struct hal_power_resource_battery *battery; /**< Function lists for battery */
} hal_backend_power_funcs;
/**
extern "C" {
#endif
-#define PASS_RESOURCE_UNKNOWN 0
-#define PASS_RESOURCE_CPU_ID 1
-#define PASS_RESOURCE_BUS_ID 2
-#define PASS_RESOURCE_GPU_ID 3
-#define PASS_RESOURCE_MEMORY_ID 4
-#define PASS_RESOURCE_BATTERY_ID 5
-#define PASS_RESOURCE_PROCESS_ID 6
-#define PASS_RESOURCE_DISPLAY_ID 7
-#define PASS_RESOURCE_SYSTEM_ID 8
-#define PASS_RESOURCE_PROCESS_GROUP_ID 9
-#define PASS_RESOURCE_DISK_ID 10
-#define PASS_RESOURCE_NETWORK_ID 11
-
-#define PASS_RESOURCE_CPU_NAME "cpu"
-#define PASS_RESOURCE_BUS_NAME "bus"
-#define PASS_RESOURCE_GPU_NAME "gpu"
-#define PASS_RESOURCE_MEMORY_NAME "memory"
-#define PASS_RESOURCE_BATTERY_NAME "battery"
-#define PASS_RESOURCE_PROCESS_NAME "process"
-#define PASS_RESOURCE_DISPLAY_NAME "display"
-#define PASS_RESOURCE_SYSTEM_NAME "system"
-#define PASS_RESOURCE_PROCESS_GROUP_NAME "process_group"
-#define PASS_RESOURCE_DISK_NAME "disk"
-#define PASS_RESOURCE_NETWORK_NAME "network"
+#define HAL_POWER_RESOURCE_UNKNOWN 0
+#define HAL_POWER_RESOURCE_CPU_ID 1
+#define HAL_POWER_RESOURCE_BUS_ID 2
+#define HAL_POWER_RESOURCE_GPU_ID 3
+#define HAL_POWER_RESOURCE_MEMORY_ID 4
+#define HAL_POWER_RESOURCE_BATTERY_ID 5
+#define HAL_POWER_RESOURCE_PROCESS_ID 6
+#define HAL_POWER_RESOURCE_DISPLAY_ID 7
+#define HAL_POWER_RESOURCE_SYSTEM_ID 8
+#define HAL_POWER_RESOURCE_PROCESS_GROUP_ID 9
+#define HAL_POWER_RESOURCE_DISK_ID 10
+#define HAL_POWER_RESOURCE_NETWORK_ID 11
+
+#define HAL_POWER_RESOURCE_CPU_NAME "cpu"
+#define HAL_POWER_RESOURCE_BUS_NAME "bus"
+#define HAL_POWER_RESOURCE_GPU_NAME "gpu"
+#define HAL_POWER_RESOURCE_MEMORY_NAME "memory"
+#define HAL_POWER_RESOURCE_BATTERY_NAME "battery"
+#define HAL_POWER_RESOURCE_PROCESS_NAME "process"
+#define HAL_POWER_RESOURCE_DISPLAY_NAME "display"
+#define HAL_POWER_RESOURCE_SYSTEM_NAME "system"
+#define HAL_POWER_RESOURCE_PROCESS_GROUP_NAME "process_group"
+#define HAL_POWER_RESOURCE_DISK_NAME "disk"
+#define HAL_POWER_RESOURCE_NETWORK_NAME "network"
int hal_power_get_backend(unsigned int res_type);
int hal_power_put_backend(void);
int hal_power_dvfs_set_up_threshold(unsigned int res_type, char *res_name, int up_threshold);
/* Get the load_table of each resource to estimate the system load. */
-int hal_power_dvfs_get_load_table(unsigned int res_type, char *name, void *pass_cpu_load_table);
+int hal_power_dvfs_get_load_table(unsigned int res_type, char *name, void *hal_power_cpu_load_table);
/**
* CPU Hotplug Operation for CPU H/W
static int is_supported_from_backend(hal_backend_power_funcs *funcs, int res_type)
{
switch (res_type) {
- case PASS_RESOURCE_CPU_ID:
+ case HAL_POWER_RESOURCE_CPU_ID:
if (funcs && funcs->cpu)
return 1;
break;
- case PASS_RESOURCE_BUS_ID:
+ case HAL_POWER_RESOURCE_BUS_ID:
if (funcs && funcs->bus)
return 1;
break;
- case PASS_RESOURCE_GPU_ID:
+ case HAL_POWER_RESOURCE_GPU_ID:
if (funcs && funcs->gpu)
return 1;
break;
- case PASS_RESOURCE_MEMORY_ID:
+ case HAL_POWER_RESOURCE_MEMORY_ID:
if (funcs && funcs->memory)
return 1;
break;
- case PASS_RESOURCE_BATTERY_ID:
+ case HAL_POWER_RESOURCE_BATTERY_ID:
if (funcs && funcs->battery)
return 1;
break;
- case PASS_RESOURCE_PROCESS_ID:
- case PASS_RESOURCE_DISPLAY_ID:
- case PASS_RESOURCE_SYSTEM_ID:
- case PASS_RESOURCE_PROCESS_GROUP_ID:
- case PASS_RESOURCE_DISK_ID:
- case PASS_RESOURCE_NETWORK_ID:
+ case HAL_POWER_RESOURCE_PROCESS_ID:
+ case HAL_POWER_RESOURCE_DISPLAY_ID:
+ case HAL_POWER_RESOURCE_SYSTEM_ID:
+ case HAL_POWER_RESOURCE_PROCESS_GROUP_ID:
+ case HAL_POWER_RESOURCE_DISK_ID:
+ case HAL_POWER_RESOURCE_NETWORK_ID:
/*
* These resource types have not yet needed any hal backend.
* But, these resource types might need the resource
}
static int get_dvfs(hal_backend_power_funcs *funcs, int res_type, char *res_name,
- struct pass_resource_dvfs_ops **dvfs)
+ struct hal_power_resource_dvfs_ops **dvfs)
{
if (!funcs)
return -ENOTSUP;
return -EINVAL;
switch (res_type) {
- case PASS_RESOURCE_CPU_ID:
+ case HAL_POWER_RESOURCE_CPU_ID:
if (funcs && funcs->cpu)
*dvfs = &(funcs->cpu->dvfs);
break;
- case PASS_RESOURCE_BUS_ID:
+ case HAL_POWER_RESOURCE_BUS_ID:
if (funcs && funcs->bus)
*dvfs = &(funcs->bus->dvfs);
break;
- case PASS_RESOURCE_GPU_ID:
+ case HAL_POWER_RESOURCE_GPU_ID:
if (funcs && funcs->gpu)
*dvfs = &(funcs->gpu->dvfs);
break;
}
static int get_tmu(hal_backend_power_funcs *funcs, int res_type, char *res_name,
- struct pass_resource_tmu_ops **tmu)
+ struct hal_power_resource_tmu_ops **tmu)
{
if (!funcs)
return -ENOTSUP;
return -EINVAL;
switch (res_type) {
- case PASS_RESOURCE_CPU_ID:
+ case HAL_POWER_RESOURCE_CPU_ID:
if (funcs && funcs->cpu)
*tmu = &(funcs->cpu->tmu);
break;
- case PASS_RESOURCE_BUS_ID:
+ case HAL_POWER_RESOURCE_BUS_ID:
if (funcs && funcs->bus)
*tmu = &(funcs->bus->tmu);
break;
- case PASS_RESOURCE_GPU_ID:
+ case HAL_POWER_RESOURCE_GPU_ID:
if (funcs && funcs->gpu)
*tmu = &(funcs->gpu->tmu);
break;
- case PASS_RESOURCE_BATTERY_ID:
+ case HAL_POWER_RESOURCE_BATTERY_ID:
if (funcs && funcs->battery)
*tmu = &(funcs->battery->tmu);
break;
}
static int get_hotplug(hal_backend_power_funcs *funcs, int res_type, char *res_name,
- struct pass_resource_hotplug_ops **hotplug)
+ struct hal_power_resource_hotplug_ops **hotplug)
{
if (!funcs)
return -ENOTSUP;
return -EINVAL;
switch (res_type) {
- case PASS_RESOURCE_CPU_ID:
+ case HAL_POWER_RESOURCE_CPU_ID:
if (funcs && funcs->cpu)
*hotplug = &(funcs->cpu->hotplug);
break;
}
static int get_charging(hal_backend_power_funcs *funcs, int res_type, char *res_name,
- struct pass_resource_battery_ops **charging)
+ struct hal_power_resource_battery_ops **charging)
{
if (!funcs)
return -ENOTSUP;
return -EINVAL;
switch (res_type) {
- case PASS_RESOURCE_BATTERY_ID:
+ case HAL_POWER_RESOURCE_BATTERY_ID:
if (funcs && funcs->battery)
*charging = &(funcs->battery->battery);
break;
if (!power_funcs)
return -ENOMEM;
- power_funcs->cpu = calloc(1, sizeof(struct pass_resource_cpu));
+ power_funcs->cpu = calloc(1, sizeof(struct hal_power_resource_cpu));
if (!power_funcs->cpu) {
ret = -ENOMEM;
goto err_funcs;
}
- power_funcs->bus = calloc(1, sizeof(struct pass_resource_bus));
+ power_funcs->bus = calloc(1, sizeof(struct hal_power_resource_bus));
if (!power_funcs->bus) {
ret = -ENOMEM;
goto err_cpu;
}
- power_funcs->gpu = calloc(1, sizeof(struct pass_resource_gpu));
+ power_funcs->gpu = calloc(1, sizeof(struct hal_power_resource_gpu));
if (!power_funcs->gpu) {
ret = -ENOMEM;
goto err_bus;
}
- power_funcs->memory = calloc(1, sizeof(struct pass_resource_memory));
+ power_funcs->memory = calloc(1, sizeof(struct hal_power_resource_memory));
if (!power_funcs->memory) {
ret = -ENOMEM;
goto err_gpu;
}
- power_funcs->battery = calloc(1, sizeof(struct pass_resource_battery));
+ power_funcs->battery = calloc(1, sizeof(struct hal_power_resource_battery));
if (!power_funcs->battery) {
ret = -ENOMEM;
goto err_memory;
EXPORT int hal_power_dvfs_get_curr_governor(unsigned int res_type,
char *res_name, char *governor)
{
- struct pass_resource_dvfs_ops *dvfs;
+ struct hal_power_resource_dvfs_ops *dvfs;
int ret;
if (!governor)
EXPORT int hal_power_dvfs_set_curr_governor(unsigned int res_type, char *res_name, char *governor)
{
- struct pass_resource_dvfs_ops *dvfs;
+ struct hal_power_resource_dvfs_ops *dvfs;
int ret;
if (!governor)
EXPORT int hal_power_dvfs_get_avail_governor(unsigned int res_type, char *res_name, char **avail_governor)
{
- struct pass_resource_dvfs_ops *dvfs;
+ struct hal_power_resource_dvfs_ops *dvfs;
int ret;
ret = get_dvfs(g_power_funcs, res_type, res_name, &dvfs);
/* Get the current frequency. */
EXPORT int hal_power_dvfs_get_curr_freq(unsigned int res_type, char *res_name)
{
- struct pass_resource_dvfs_ops *dvfs;
+ struct hal_power_resource_dvfs_ops *dvfs;
int ret;
ret = get_dvfs(g_power_funcs, res_type, res_name, &dvfs);
/* Get and set the minimum frequency. */
EXPORT int hal_power_dvfs_get_min_freq(unsigned int res_type, char *res_name)
{
- struct pass_resource_dvfs_ops *dvfs;
+ struct hal_power_resource_dvfs_ops *dvfs;
int ret;
ret = get_dvfs(g_power_funcs, res_type, res_name, &dvfs);
EXPORT int hal_power_dvfs_set_min_freq(unsigned int res_type, char *res_name, int freq)
{
- struct pass_resource_dvfs_ops *dvfs;
+ struct hal_power_resource_dvfs_ops *dvfs;
int ret;
if (freq < 0)
/* Get and set the maximum frequency. */
EXPORT int hal_power_dvfs_get_max_freq(unsigned int res_type, char *res_name)
{
- struct pass_resource_dvfs_ops *dvfs;
+ struct hal_power_resource_dvfs_ops *dvfs;
int ret;
ret = get_dvfs(g_power_funcs, res_type, res_name, &dvfs);
EXPORT int hal_power_dvfs_set_max_freq(unsigned int res_type, char *res_name, int freq)
{
- struct pass_resource_dvfs_ops *dvfs;
+ struct hal_power_resource_dvfs_ops *dvfs;
int ret;
if (freq < 0)
/* Get the minimum/maximum frequency which can be set to resource. */
EXPORT int hal_power_dvfs_get_available_min_freq(unsigned int res_type, char *res_name)
{
- struct pass_resource_dvfs_ops *dvfs;
+ struct hal_power_resource_dvfs_ops *dvfs;
int ret;
ret = get_dvfs(g_power_funcs, res_type, res_name, &dvfs);
EXPORT int hal_power_dvfs_get_available_max_freq(unsigned int res_type, char *res_name)
{
- struct pass_resource_dvfs_ops *dvfs;
+ struct hal_power_resource_dvfs_ops *dvfs;
int ret;
ret = get_dvfs(g_power_funcs, res_type, res_name, &dvfs);
/* Get and set the up_threshold to support boosting. */
EXPORT int hal_power_dvfs_get_up_threshold(unsigned int res_type, char *res_name)
{
- struct pass_resource_dvfs_ops *dvfs;
+ struct hal_power_resource_dvfs_ops *dvfs;
int ret;
ret = get_dvfs(g_power_funcs, res_type, res_name, &dvfs);
EXPORT int hal_power_dvfs_set_up_threshold(unsigned int res_type, char *res_name, int up_threshold)
{
- struct pass_resource_dvfs_ops *dvfs;
+ struct hal_power_resource_dvfs_ops *dvfs;
int ret;
if (up_threshold < 0)
}
/* Get the load_table of each resource to estimate the system load. */
-EXPORT int hal_power_dvfs_get_load_table(unsigned int res_type, char *res_name, void *pass_cpu_load_table)
+EXPORT int hal_power_dvfs_get_load_table(unsigned int res_type, char *res_name, void *hal_power_cpu_load_table)
{
- struct pass_resource_dvfs_ops *dvfs;
+ struct hal_power_resource_dvfs_ops *dvfs;
int ret;
ret = get_dvfs(g_power_funcs, res_type, res_name, &dvfs);
if (!dvfs->get_load_table)
return -ENOTSUP;
- return dvfs->get_load_table(res_name, pass_cpu_load_table);
+ return dvfs->get_load_table(res_name, hal_power_cpu_load_table);
}
/**
/* Get and set the online status of resource. */
EXPORT int hal_power_hotplug_get_online_state(unsigned int res_type, char *res_name, int cpu)
{
- struct pass_resource_hotplug_ops *hotplug;
+ struct hal_power_resource_hotplug_ops *hotplug;
int ret;
if (cpu < 0)
EXPORT int hal_power_hotplug_set_online_state(unsigned int res_type, char *res_name, int cpu, int on)
{
- struct pass_resource_hotplug_ops *hotplug;
+ struct hal_power_resource_hotplug_ops *hotplug;
int ret;
if (cpu < 0 || on < 0)
/* Get and set the minimum number of online CPUs */
EXPORT int hal_power_hotplug_get_online_min_num(unsigned int res_type, char *res_name)
{
- struct pass_resource_hotplug_ops *hotplug;
+ struct hal_power_resource_hotplug_ops *hotplug;
int ret;
ret = get_hotplug(g_power_funcs, res_type, res_name, &hotplug);
EXPORT int hal_power_hotplug_set_online_min_num(unsigned int res_type,
char *res_name, int min_num)
{
- struct pass_resource_hotplug_ops *hotplug;
+ struct hal_power_resource_hotplug_ops *hotplug;
int ret;
if (min_num < 0)
EXPORT int hal_power_hotplug_get_online_max_num(unsigned int res_type,
char *res_name)
{
- struct pass_resource_hotplug_ops *hotplug;
+ struct hal_power_resource_hotplug_ops *hotplug;
int ret;
ret = get_hotplug(g_power_funcs, res_type, res_name, &hotplug);
EXPORT int hal_power_hotplug_set_online_max_num(unsigned int res_type,
char *res_name, int max_num)
{
- struct pass_resource_hotplug_ops *hotplug;
+ struct hal_power_resource_hotplug_ops *hotplug;
int ret;
if (max_num < 0)
EXPORT int hal_power_thermal_get_temp(unsigned int res_type,
char *res_thermal_name)
{
- struct pass_resource_tmu_ops *tmu;
+ struct hal_power_resource_tmu_ops *tmu;
int ret;
ret = get_tmu(g_power_funcs, res_type, res_thermal_name, &tmu);
char *res_thermal_name,
char *policy)
{
- struct pass_resource_tmu_ops *tmu;
+ struct hal_power_resource_tmu_ops *tmu;
int ret;
if (!policy)
char *cooling_device_name,
int state)
{
- struct pass_resource_tmu_ops *tmu;
+ struct hal_power_resource_tmu_ops *tmu;
int ret;
if (state < 0)
EXPORT int hal_power_thermal_get_cooling_device_state(unsigned int device_type,
char *cooling_device_name)
{
- struct pass_resource_tmu_ops *tmu;
+ struct hal_power_resource_tmu_ops *tmu;
int ret;
ret= get_tmu(g_power_funcs, device_type, cooling_device_name, &tmu);
EXPORT int hal_power_thermal_get_cooling_device_max_state(unsigned int device_type,
char *cooling_device_name)
{
- struct pass_resource_tmu_ops *tmu;
+ struct hal_power_resource_tmu_ops *tmu;
int ret;
ret = get_tmu(g_power_funcs, device_type, cooling_device_name, &tmu);
char *res_name,
int state)
{
- struct pass_resource_battery_ops *charging;
+ struct hal_power_resource_battery_ops *charging;
int ret;
if (state < 0)
EXPORT int hal_power_battery_get_charging_status(unsigned int device_type,
char *res_name)
{
- struct pass_resource_battery_ops *charging;
+ struct hal_power_resource_battery_ops *charging;
int ret;
ret = get_charging(g_power_funcs, device_type, res_name, &charging);
char *res_name,
int charing_current_uA)
{
- struct pass_resource_battery_ops *charging;
+ struct hal_power_resource_battery_ops *charging;
int ret;
if (charing_current_uA < 0)
EXPORT int hal_power_battery_get_charging_current(unsigned int device_type,
char *res_name)
{
- struct pass_resource_battery_ops *charging;
+ struct hal_power_resource_battery_ops *charging;
int ret;
ret = get_charging(g_power_funcs, device_type, res_name, &charging);
EXPORT int hal_power_memory_get_fault_around_bytes(unsigned int res_type,
char *res_name)
{
- struct pass_resource_memory *memory;
+ struct hal_power_resource_memory *memory;
int ret;
if (!res_name)
return -EINVAL;
switch (res_type) {
- case PASS_RESOURCE_MEMORY_ID:
+ case HAL_POWER_RESOURCE_MEMORY_ID:
memory = g_power_funcs->memory;
break;
default:
char *res_name,
int fault_around_bytes)
{
- struct pass_resource_memory *memory;
+ struct hal_power_resource_memory *memory;
int ret;
ret = is_valid_param_with_int(res_name, fault_around_bytes);
return -EINVAL;
switch (res_type) {
- case PASS_RESOURCE_MEMORY_ID:
+ case HAL_POWER_RESOURCE_MEMORY_ID:
memory = g_power_funcs->memory;
break;
default:
return 0;
}
-static struct pass_resource_dvfs_ops cpufreq_dvfs_ops = {
+static struct hal_power_resource_dvfs_ops cpufreq_dvfs_ops = {
.get_curr_governor = get_string_value,
.set_curr_governor = set_string_value,
.get_curr_freq = get_value,
return 0;
}
-static struct pass_resource_hotplug_ops cpu_hotplus_ops = {
+static struct hal_power_resource_hotplug_ops cpu_hotplus_ops = {
.get_online_state = cpu_hotplug_get_online_state,
.set_online_state = cpu_hotplug_set_online_state,
.get_online_min_num = NULL,
.set_online_max_num = NULL,
};
-static struct pass_resource_tmu_ops tmu_ops = {
+static struct hal_power_resource_tmu_ops tmu_ops = {
.get_temp = get_value,
.get_policy = get_string_value,
};
-static struct pass_resource_dvfs_ops devfreq_dvfs_ops = {
+static struct hal_power_resource_dvfs_ops devfreq_dvfs_ops = {
.get_curr_governor = get_string_value,
.set_curr_governor = set_string_value,
.get_curr_freq = get_value,
if (!power_funcs)
return -ENOMEM;
- power_funcs->cpu = (struct pass_resource_cpu *)calloc(1,
- sizeof(struct pass_resource_cpu));
+ power_funcs->cpu = (struct hal_power_resource_cpu *)calloc(1,
+ sizeof(struct hal_power_resource_cpu));
if (!power_funcs->cpu) {
ret = -ENOMEM;
goto err_cpu;
}
- power_funcs->bus = (struct pass_resource_bus *)calloc(1,
- sizeof(struct pass_resource_bus));
+ power_funcs->bus = (struct hal_power_resource_bus *)calloc(1,
+ sizeof(struct hal_power_resource_bus));
if (!power_funcs->bus) {
ret = -ENOMEM;
goto err_bus;
}
- power_funcs->gpu = (struct pass_resource_gpu *)calloc(1,
- sizeof(struct pass_resource_gpu));
+ power_funcs->gpu = (struct hal_power_resource_gpu *)calloc(1,
+ sizeof(struct hal_power_resource_gpu));
if (!power_funcs->gpu) {
ret = -ENOMEM;
goto err_gpu;
}
- power_funcs->memory = (struct pass_resource_memory *)calloc(1,
- sizeof(struct pass_resource_memory));
+ power_funcs->memory = (struct hal_power_resource_memory *)calloc(1,
+ sizeof(struct hal_power_resource_memory));
if (!power_funcs->memory) {
ret = -ENOMEM;
goto err_memory;
}
static int resources[] = {
- PASS_RESOURCE_CPU_ID,
- PASS_RESOURCE_BUS_ID,
- PASS_RESOURCE_GPU_ID,
- PASS_RESOURCE_MEMORY_ID,
+ HAL_POWER_RESOURCE_CPU_ID,
+ HAL_POWER_RESOURCE_BUS_ID,
+ HAL_POWER_RESOURCE_GPU_ID,
+ HAL_POWER_RESOURCE_MEMORY_ID,
};
static int test_begin(void)
}
TEST(HalApiPowerTest, hal_power_get_backend_with_cpu_id) {
- int ret = hal_power_get_backend(PASS_RESOURCE_CPU_ID);
+ int ret = hal_power_get_backend(HAL_POWER_RESOURCE_CPU_ID);
EXPECT_TRUE(ret == 0);
ret = hal_power_put_backend();
}
TEST(HalApiPowerTest, hal_power_get_backend_with_bus_id) {
- int ret = hal_power_get_backend(PASS_RESOURCE_BUS_ID);
+ int ret = hal_power_get_backend(HAL_POWER_RESOURCE_BUS_ID);
EXPECT_TRUE(ret == 0);
ret = hal_power_put_backend();
}
TEST(HalApiPowerTest, hal_power_get_backend_with_gpu_id) {
- int ret = hal_power_get_backend(PASS_RESOURCE_GPU_ID);
+ int ret = hal_power_get_backend(HAL_POWER_RESOURCE_GPU_ID);
EXPECT_TRUE(ret == 0);
ret = hal_power_put_backend();
}
TEST(HalApiPowerTest, hal_power_get_backend_with_memory_id) {
- int ret = hal_power_get_backend(PASS_RESOURCE_MEMORY_ID);
+ int ret = hal_power_get_backend(HAL_POWER_RESOURCE_MEMORY_ID);
EXPECT_TRUE(ret == 0);
ret = hal_power_put_backend();
ret = test_begin();
EXPECT_TRUE(ret == 0);
- ret = hal_power_dvfs_get_curr_governor(PASS_RESOURCE_CPU_ID, res_name, governor);
+ ret = hal_power_dvfs_get_curr_governor(HAL_POWER_RESOURCE_CPU_ID, res_name, governor);
EXPECT_TRUE(ret == 0);
- ret = hal_power_dvfs_get_curr_governor(PASS_RESOURCE_BUS_ID, res_name, governor);
+ ret = hal_power_dvfs_get_curr_governor(HAL_POWER_RESOURCE_BUS_ID, res_name, governor);
EXPECT_TRUE(ret == 0);
- ret = hal_power_dvfs_get_curr_governor(PASS_RESOURCE_GPU_ID, res_name, governor);
+ ret = hal_power_dvfs_get_curr_governor(HAL_POWER_RESOURCE_GPU_ID, res_name, governor);
EXPECT_TRUE(ret == 0);
ret = test_end();
ret = test_begin();
EXPECT_TRUE(ret == 0);
- ret = hal_power_dvfs_get_curr_governor(PASS_RESOURCE_CPU_ID, NULL, governor);
+ ret = hal_power_dvfs_get_curr_governor(HAL_POWER_RESOURCE_CPU_ID, NULL, governor);
EXPECT_TRUE(ret == -EINVAL);
- ret = hal_power_dvfs_get_curr_governor(PASS_RESOURCE_CPU_ID, res_name, NULL);
+ ret = hal_power_dvfs_get_curr_governor(HAL_POWER_RESOURCE_CPU_ID, res_name, NULL);
EXPECT_TRUE(ret == -EINVAL);
- ret = hal_power_dvfs_get_curr_governor(PASS_RESOURCE_BUS_ID, NULL, governor);
+ ret = hal_power_dvfs_get_curr_governor(HAL_POWER_RESOURCE_BUS_ID, NULL, governor);
EXPECT_TRUE(ret == -EINVAL);
- ret = hal_power_dvfs_get_curr_governor(PASS_RESOURCE_BUS_ID, res_name, NULL);
+ ret = hal_power_dvfs_get_curr_governor(HAL_POWER_RESOURCE_BUS_ID, res_name, NULL);
EXPECT_TRUE(ret == -EINVAL);
- ret = hal_power_dvfs_get_curr_governor(PASS_RESOURCE_GPU_ID, NULL, governor);
+ ret = hal_power_dvfs_get_curr_governor(HAL_POWER_RESOURCE_GPU_ID, NULL, governor);
EXPECT_TRUE(ret == -EINVAL);
- ret = hal_power_dvfs_get_curr_governor(PASS_RESOURCE_GPU_ID, res_name, NULL);
+ ret = hal_power_dvfs_get_curr_governor(HAL_POWER_RESOURCE_GPU_ID, res_name, NULL);
EXPECT_TRUE(ret == -EINVAL);
- ret = hal_power_dvfs_get_curr_governor(PASS_RESOURCE_MEMORY_ID, res_name, governor);
+ ret = hal_power_dvfs_get_curr_governor(HAL_POWER_RESOURCE_MEMORY_ID, res_name, governor);
EXPECT_TRUE(ret == -EPERM);
ret = test_end();
ret = test_begin();
EXPECT_TRUE(ret == 0);
- ret = hal_power_dvfs_get_curr_freq(PASS_RESOURCE_CPU_ID, res_name);
+ ret = hal_power_dvfs_get_curr_freq(HAL_POWER_RESOURCE_CPU_ID, res_name);
EXPECT_TRUE(ret > 0);
- ret = hal_power_dvfs_get_curr_freq(PASS_RESOURCE_BUS_ID, res_name);
+ ret = hal_power_dvfs_get_curr_freq(HAL_POWER_RESOURCE_BUS_ID, res_name);
EXPECT_TRUE(ret > 0);
- ret = hal_power_dvfs_get_curr_freq(PASS_RESOURCE_GPU_ID, res_name);
+ ret = hal_power_dvfs_get_curr_freq(HAL_POWER_RESOURCE_GPU_ID, res_name);
EXPECT_TRUE(ret > 0);
ret = test_end();
ret = test_begin();
EXPECT_TRUE(ret == 0);
- ret = hal_power_dvfs_get_curr_freq(PASS_RESOURCE_UNKNOWN, res_name);
+ ret = hal_power_dvfs_get_curr_freq(HAL_POWER_RESOURCE_UNKNOWN, res_name);
EXPECT_TRUE(ret != 0);
- ret = hal_power_dvfs_get_curr_freq(PASS_RESOURCE_UNKNOWN, NULL);
+ ret = hal_power_dvfs_get_curr_freq(HAL_POWER_RESOURCE_UNKNOWN, NULL);
EXPECT_TRUE(ret == -EINVAL);
- ret = hal_power_dvfs_get_curr_freq(PASS_RESOURCE_CPU_ID, NULL);
+ ret = hal_power_dvfs_get_curr_freq(HAL_POWER_RESOURCE_CPU_ID, NULL);
EXPECT_TRUE(ret == -EINVAL);
- ret = hal_power_dvfs_get_curr_freq(PASS_RESOURCE_BUS_ID, NULL);
+ ret = hal_power_dvfs_get_curr_freq(HAL_POWER_RESOURCE_BUS_ID, NULL);
EXPECT_TRUE(ret == -EINVAL);
- ret = hal_power_dvfs_get_curr_freq(PASS_RESOURCE_GPU_ID, NULL);
+ ret = hal_power_dvfs_get_curr_freq(HAL_POWER_RESOURCE_GPU_ID, NULL);
EXPECT_TRUE(ret == -EINVAL);
- ret = hal_power_dvfs_get_curr_freq(PASS_RESOURCE_MEMORY_ID, res_name);
+ ret = hal_power_dvfs_get_curr_freq(HAL_POWER_RESOURCE_MEMORY_ID, res_name);
EXPECT_TRUE(ret == -EPERM);
ret = test_end();
ret = test_begin();
EXPECT_TRUE(ret == 0);
- ret = hal_power_dvfs_get_min_freq(PASS_RESOURCE_CPU_ID, res_name);
+ ret = hal_power_dvfs_get_min_freq(HAL_POWER_RESOURCE_CPU_ID, res_name);
EXPECT_TRUE(ret > 0);
- ret = hal_power_dvfs_get_min_freq(PASS_RESOURCE_BUS_ID, res_name);
+ ret = hal_power_dvfs_get_min_freq(HAL_POWER_RESOURCE_BUS_ID, res_name);
EXPECT_TRUE(ret > 0);
- ret = hal_power_dvfs_get_min_freq(PASS_RESOURCE_GPU_ID, res_name);
+ ret = hal_power_dvfs_get_min_freq(HAL_POWER_RESOURCE_GPU_ID, res_name);
EXPECT_TRUE(ret > 0);
ret = test_end();
ret = test_begin();
EXPECT_TRUE(ret == 0);
- ret = hal_power_dvfs_get_min_freq(PASS_RESOURCE_UNKNOWN, res_name);
+ ret = hal_power_dvfs_get_min_freq(HAL_POWER_RESOURCE_UNKNOWN, res_name);
EXPECT_TRUE(ret != 0);
- ret = hal_power_dvfs_get_min_freq(PASS_RESOURCE_UNKNOWN, NULL);
+ ret = hal_power_dvfs_get_min_freq(HAL_POWER_RESOURCE_UNKNOWN, NULL);
EXPECT_TRUE(ret == -EINVAL);
- ret = hal_power_dvfs_get_min_freq(PASS_RESOURCE_CPU_ID, NULL);
+ ret = hal_power_dvfs_get_min_freq(HAL_POWER_RESOURCE_CPU_ID, NULL);
EXPECT_TRUE(ret == -EINVAL);
- ret = hal_power_dvfs_get_min_freq(PASS_RESOURCE_BUS_ID, NULL);
+ ret = hal_power_dvfs_get_min_freq(HAL_POWER_RESOURCE_BUS_ID, NULL);
EXPECT_TRUE(ret == -EINVAL);
- ret = hal_power_dvfs_get_min_freq(PASS_RESOURCE_GPU_ID, NULL);
+ ret = hal_power_dvfs_get_min_freq(HAL_POWER_RESOURCE_GPU_ID, NULL);
EXPECT_TRUE(ret == -EINVAL);
- ret = hal_power_dvfs_get_min_freq(PASS_RESOURCE_MEMORY_ID, res_name);
+ ret = hal_power_dvfs_get_min_freq(HAL_POWER_RESOURCE_MEMORY_ID, res_name);
EXPECT_TRUE(ret == -EPERM);
ret = test_end();
ret = test_begin();
EXPECT_TRUE(ret == 0);
- ret = hal_power_dvfs_get_max_freq(PASS_RESOURCE_CPU_ID, res_name);
+ ret = hal_power_dvfs_get_max_freq(HAL_POWER_RESOURCE_CPU_ID, res_name);
EXPECT_TRUE(ret > 0);
- ret = hal_power_dvfs_get_max_freq(PASS_RESOURCE_BUS_ID, res_name);
+ ret = hal_power_dvfs_get_max_freq(HAL_POWER_RESOURCE_BUS_ID, res_name);
EXPECT_TRUE(ret > 0);
- ret = hal_power_dvfs_get_max_freq(PASS_RESOURCE_GPU_ID, res_name);
+ ret = hal_power_dvfs_get_max_freq(HAL_POWER_RESOURCE_GPU_ID, res_name);
EXPECT_TRUE(ret > 0);
ret = test_end();
ret = test_begin();
EXPECT_TRUE(ret == 0);
- ret = hal_power_dvfs_get_max_freq(PASS_RESOURCE_UNKNOWN, res_name);
+ ret = hal_power_dvfs_get_max_freq(HAL_POWER_RESOURCE_UNKNOWN, res_name);
EXPECT_TRUE(ret != 0);
- ret = hal_power_dvfs_get_max_freq(PASS_RESOURCE_UNKNOWN, NULL);
+ ret = hal_power_dvfs_get_max_freq(HAL_POWER_RESOURCE_UNKNOWN, NULL);
EXPECT_TRUE(ret == -EINVAL);
- ret = hal_power_dvfs_get_max_freq(PASS_RESOURCE_CPU_ID, NULL);
+ ret = hal_power_dvfs_get_max_freq(HAL_POWER_RESOURCE_CPU_ID, NULL);
EXPECT_TRUE(ret == -EINVAL);
- ret = hal_power_dvfs_get_max_freq(PASS_RESOURCE_BUS_ID, NULL);
+ ret = hal_power_dvfs_get_max_freq(HAL_POWER_RESOURCE_BUS_ID, NULL);
EXPECT_TRUE(ret == -EINVAL);
- ret = hal_power_dvfs_get_max_freq(PASS_RESOURCE_GPU_ID, NULL);
+ ret = hal_power_dvfs_get_max_freq(HAL_POWER_RESOURCE_GPU_ID, NULL);
EXPECT_TRUE(ret == -EINVAL);
- ret = hal_power_dvfs_get_max_freq(PASS_RESOURCE_MEMORY_ID, res_name);
+ ret = hal_power_dvfs_get_max_freq(HAL_POWER_RESOURCE_MEMORY_ID, res_name);
EXPECT_TRUE(ret == -EPERM);
ret = test_end();
ret = test_begin();
EXPECT_TRUE(ret == 0);
- ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_CPU_ID, res_name, DEFAULT_FREQ);
+ ret = hal_power_dvfs_set_min_freq(HAL_POWER_RESOURCE_CPU_ID, res_name, DEFAULT_FREQ);
EXPECT_TRUE(ret == 0);
- ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_BUS_ID, res_name, DEFAULT_FREQ);
+ ret = hal_power_dvfs_set_min_freq(HAL_POWER_RESOURCE_BUS_ID, res_name, DEFAULT_FREQ);
EXPECT_TRUE(ret == 0);
- ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_GPU_ID, res_name, DEFAULT_FREQ);
+ ret = hal_power_dvfs_set_min_freq(HAL_POWER_RESOURCE_GPU_ID, res_name, DEFAULT_FREQ);
EXPECT_TRUE(ret == 0);
ret = test_end();
ret = test_begin();
EXPECT_TRUE(ret == 0);
- ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_UNKNOWN, res_name, DEFAULT_FREQ);
+ ret = hal_power_dvfs_set_min_freq(HAL_POWER_RESOURCE_UNKNOWN, res_name, DEFAULT_FREQ);
EXPECT_TRUE(ret != 0);
- ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_UNKNOWN, res_name, -1);
+ ret = hal_power_dvfs_set_min_freq(HAL_POWER_RESOURCE_UNKNOWN, res_name, -1);
EXPECT_TRUE(ret != 0);
- ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_UNKNOWN, NULL, 0);
+ ret = hal_power_dvfs_set_min_freq(HAL_POWER_RESOURCE_UNKNOWN, NULL, 0);
EXPECT_TRUE(ret != 0);
- ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_CPU_ID, res_name, -1);
+ ret = hal_power_dvfs_set_min_freq(HAL_POWER_RESOURCE_CPU_ID, res_name, -1);
EXPECT_TRUE(ret != 0);
- ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_CPU_ID, NULL, 0);
+ ret = hal_power_dvfs_set_min_freq(HAL_POWER_RESOURCE_CPU_ID, NULL, 0);
EXPECT_TRUE(ret != 0);
- ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_BUS_ID, res_name, -1);
+ ret = hal_power_dvfs_set_min_freq(HAL_POWER_RESOURCE_BUS_ID, res_name, -1);
EXPECT_TRUE(ret != 0);
- ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_BUS_ID, NULL, 0);
+ ret = hal_power_dvfs_set_min_freq(HAL_POWER_RESOURCE_BUS_ID, NULL, 0);
EXPECT_TRUE(ret != 0);
- ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_GPU_ID, res_name, -1);
+ ret = hal_power_dvfs_set_min_freq(HAL_POWER_RESOURCE_GPU_ID, res_name, -1);
EXPECT_TRUE(ret != 0);
- ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_GPU_ID, NULL, 0);
+ ret = hal_power_dvfs_set_min_freq(HAL_POWER_RESOURCE_GPU_ID, NULL, 0);
EXPECT_TRUE(ret != 0);
- ret = hal_power_dvfs_set_min_freq(PASS_RESOURCE_MEMORY_ID, res_name, 0);
+ ret = hal_power_dvfs_set_min_freq(HAL_POWER_RESOURCE_MEMORY_ID, res_name, 0);
EXPECT_TRUE(ret != 0);
ret = test_end();
ret = test_begin();
EXPECT_TRUE(ret == 0);
- ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_CPU_ID, res_name, DEFAULT_FREQ);
+ ret = hal_power_dvfs_set_max_freq(HAL_POWER_RESOURCE_CPU_ID, res_name, DEFAULT_FREQ);
EXPECT_TRUE(ret == 0);
- ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_BUS_ID, res_name, DEFAULT_FREQ);
+ ret = hal_power_dvfs_set_max_freq(HAL_POWER_RESOURCE_BUS_ID, res_name, DEFAULT_FREQ);
EXPECT_TRUE(ret == 0);
- ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_GPU_ID, res_name, DEFAULT_FREQ);
+ ret = hal_power_dvfs_set_max_freq(HAL_POWER_RESOURCE_GPU_ID, res_name, DEFAULT_FREQ);
EXPECT_TRUE(ret == 0);
ret = test_end();
ret = test_begin();
EXPECT_TRUE(ret == 0);
- ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_UNKNOWN, res_name, DEFAULT_FREQ);
+ ret = hal_power_dvfs_set_max_freq(HAL_POWER_RESOURCE_UNKNOWN, res_name, DEFAULT_FREQ);
EXPECT_TRUE(ret != 0);
- ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_UNKNOWN, res_name, -1);
+ ret = hal_power_dvfs_set_max_freq(HAL_POWER_RESOURCE_UNKNOWN, res_name, -1);
EXPECT_TRUE(ret != 0);
- ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_UNKNOWN, NULL, 0);
+ ret = hal_power_dvfs_set_max_freq(HAL_POWER_RESOURCE_UNKNOWN, NULL, 0);
EXPECT_TRUE(ret != 0);
- ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_CPU_ID, res_name, -1);
+ ret = hal_power_dvfs_set_max_freq(HAL_POWER_RESOURCE_CPU_ID, res_name, -1);
EXPECT_TRUE(ret != 0);
- ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_CPU_ID, NULL, 0);
+ ret = hal_power_dvfs_set_max_freq(HAL_POWER_RESOURCE_CPU_ID, NULL, 0);
EXPECT_TRUE(ret != 0);
- ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_BUS_ID, res_name, -1);
+ ret = hal_power_dvfs_set_max_freq(HAL_POWER_RESOURCE_BUS_ID, res_name, -1);
EXPECT_TRUE(ret != 0);
- ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_BUS_ID, NULL, 0);
+ ret = hal_power_dvfs_set_max_freq(HAL_POWER_RESOURCE_BUS_ID, NULL, 0);
EXPECT_TRUE(ret != 0);
- ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_GPU_ID, res_name, -1);
+ ret = hal_power_dvfs_set_max_freq(HAL_POWER_RESOURCE_GPU_ID, res_name, -1);
EXPECT_TRUE(ret != 0);
- ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_GPU_ID, NULL, 0);
+ ret = hal_power_dvfs_set_max_freq(HAL_POWER_RESOURCE_GPU_ID, NULL, 0);
EXPECT_TRUE(ret != 0);
- ret = hal_power_dvfs_set_max_freq(PASS_RESOURCE_MEMORY_ID, res_name, 0);
+ ret = hal_power_dvfs_set_max_freq(HAL_POWER_RESOURCE_MEMORY_ID, res_name, 0);
EXPECT_TRUE(ret != 0);
ret = test_end();
ret = test_begin();
EXPECT_TRUE(ret == 0);
- ret = hal_power_memory_set_fault_around_bytes(PASS_RESOURCE_MEMORY_ID, res_name, DEFAULT_FAULT_AROUND_BYTES);
+ ret = hal_power_memory_set_fault_around_bytes(HAL_POWER_RESOURCE_MEMORY_ID, res_name, DEFAULT_FAULT_AROUND_BYTES);
EXPECT_TRUE(ret == 0);
ret = test_end();
ret = test_begin();
EXPECT_TRUE(ret == 0);
- ret = hal_power_memory_set_fault_around_bytes(PASS_RESOURCE_MEMORY_ID, res_name, 0);
+ ret = hal_power_memory_set_fault_around_bytes(HAL_POWER_RESOURCE_MEMORY_ID, res_name, 0);
EXPECT_TRUE(ret != 0);
- ret = hal_power_memory_set_fault_around_bytes(PASS_RESOURCE_MEMORY_ID, res_name, 6000);
+ ret = hal_power_memory_set_fault_around_bytes(HAL_POWER_RESOURCE_MEMORY_ID, res_name, 6000);
EXPECT_TRUE(ret != 0);
ret = test_end();