Add AArch64 support 79/21379/2 tizen_3.0.m14.2_ivi submit/tizen_common/20140521.163740 submit/tizen_common/20140522.130648 submit/tizen_common/20140522.135644 submit/tizen_ivi/20140618.000000 submit/tizen_ivi/20140618.000001 submit/tizen_ivi/20140619.000000 submit/tizen_ivi/20140622.000000 submit/tizen_ivi/20140623.000000 submit/tizen_ivi/20140624.064036 submit/tizen_ivi/20140626.125712 submit/tizen_ivi/20140626.130032 submit/tizen_ivi/20140626.144348 tizen_3.0.m14.2_ivi_release
authorYury Usishchev <y.usishchev@samsung.com>
Mon, 19 May 2014 11:51:10 +0000 (15:51 +0400)
committerYury Usishchev <y.usishchev@samsung.com>
Mon, 19 May 2014 12:03:07 +0000 (16:03 +0400)
Add support for aarch64 registers to sighandler function.

Change-Id: Id705514ce851ee8b0e03402540ed8cf345a27bb0
Signed-off-by: Yury Usishchev <y.usishchev@samsung.com>
sys-assert/src/sys-assert.c

index 086414da85a737947e9d5c6c54e569d518d8dd02..af9700ec2599f00eed908b976cad25a7e37446b4 100755 (executable)
@@ -653,6 +653,16 @@ void sighandler(int signum, siginfo_t *info, void *context)
                close(fd);
        }
 #ifdef TARGET
+#ifdef __aarch64__
+       cnt_callstack = backtrace(callstack_addrs, CALLSTACK_SIZE);
+       if (cnt_callstack > 2) {
+               cnt_callstack -= 2;
+       } else {
+               callstack_addrs[2] = (long *)ucontext->uc_mcontext.pc;
+               callstack_addrs[3] = (long *)ucontext->uc_mcontext.sp;
+               cnt_callstack = 2;
+       }
+#else
        cnt_callstack = unw_backtrace(callstack_addrs, CALLSTACK_SIZE);
        if (cnt_callstack > 2) {
                cnt_callstack -= 2;
@@ -661,6 +671,7 @@ void sighandler(int signum, siginfo_t *info, void *context)
                callstack_addrs[3] = (long *)ucontext->uc_mcontext.arm_lr;
                cnt_callstack = 2;
        }
+#endif
 #else          /* i386 */
 #if __x86_64__
        layout *ebp = ucontext->uc_mcontext.gregs[REG_RBP];
@@ -752,6 +763,19 @@ void sighandler(int signum, siginfo_t *info, void *context)
        fsync(fd_cs);
        /* print additional info */
 #ifdef TARGET
+#ifdef __aarch64__
+       fprintf_fd(fd_cs, "\n%s\n", CRASH_REGISTERINFO_TITLE);
+       int i;
+       for (i = 0; i < 31; ++i) {
+               fprintf_fd(fd_cs,
+                               "x%d  = 0x%016x\n",
+                               i, ucontext->uc_mcontext.regs[i]);
+       }
+
+       fprintf_fd(fd_cs, "sp = 0x%016x\n", ucontext->uc_mcontext.sp);
+       fprintf_fd(fd_cs, "pc = 0x%016x\n", ucontext->uc_mcontext.pc);
+       fprintf_fd(fd_cs, "pstate = 0x%016x\n", ucontext->uc_mcontext.pstate);
+#else
        fprintf_fd(fd_cs, "\n%s\n", CRASH_REGISTERINFO_TITLE);
        fprintf_fd(fd_cs,
                        "r0   = 0x%08x, r1   = 0x%08x\nr2   = 0x%08x, r3   = 0x%08x\n",
@@ -774,6 +798,7 @@ void sighandler(int signum, siginfo_t *info, void *context)
                        ucontext->uc_mcontext.arm_sp,
                        ucontext->uc_mcontext.arm_lr, ucontext->uc_mcontext.arm_pc);
        fprintf_fd(fd_cs, "cpsr = 0x%08x\n", ucontext->uc_mcontext.arm_cpsr);
+#endif
 #else
        fprintf_fd(fd_cs, "\n%s\n", CRASH_REGISTERINFO_TITLE);