PUBLIC void SPI_SetRxLen(uint32 data_len, uint32 dummy_bitlen);\r
PUBLIC void SPI_TxReq( void );\r
PUBLIC void SPI_RxReq( void );\r
- PUBLIC void SPI_WaitTxFinish();\r
+ PUBLIC void SPI_WaitTxFinish(void);\r
\r
PUBLIC void SPI_Init(SPI_INIT_PARM *spi_parm);\r
PUBLIC void SPI_WriteData(uint32 data, uint32 data_len, uint32 dummy_bitlen);\r
\r
PUBLIC void SPI_Reset( uint32 spi_id, uint32 ms)\r
{\r
- uint32 i = 0;\r
#if defined(CONFIG_SC8830) || defined(CONFIG_SC9630)\r
-\r
#else\r
+ uint32 i = 0;\r
+\r
if(spi_id == 0)\r
{\r
*(volatile uint32 *)GR_SOFT_RST |= (1 << 14);\r
#endif\r
}\r
\r
-\r
-LOCAL void SPI_PinConfig(void)\r
-{\r
-}\r
-\r
-\r
// The dividend is clk_spiX_div[1:0] + 1\r
PUBLIC void SPI_ClkSetting(uint32 spi_id, uint32 clk_src, uint32 clk_div)\r
{\r
PUBLIC void SPI_SetCsLow( uint32 spi_sel_csx , BOOLEAN is_low)\r
{\r
volatile SPI_CTL_REG_T *spi_ctr_ptr = (volatile SPI_CTL_REG_T*)(SPI_USED_BASE);\r
- uint32 temp;\r
\r
if(is_low) {\r
//spi_ctl0[11:8]:cs3<->cs0 chip select, 0-selected;1-none\r
{\r
volatile SPI_CTL_REG_T *spi_ctr_ptr = (volatile SPI_CTL_REG_T *)(SPI_USED_BASE);\r
uint32 temp;\r
- uint32 ctl0, ctl1, ctl2, ctl3;\r
\r
/*default clk is 500k 192M /(0xc0 * 2)*/\r
spi_ctr_ptr->clkd =0xc0;\r
#endif\r
}\r
\r
-PUBLIC void SPI_WaitTxFinish()\r
+PUBLIC void SPI_WaitTxFinish(void)\r
{\r
volatile SPI_CTL_REG_T *spi_ctr_ptr = (volatile SPI_CTL_REG_T *)(SPI_USED_BASE);\r
\r
- while( !(spi_ctr_ptr->iraw)&BIT_8 ) // IS tx finish\r
+ while( !((spi_ctr_ptr->iraw)&BIT_8) ) // IS tx finish\r
{\r
} \r
spi_ctr_ptr->iclr |= BIT_8;\r
\r
PUBLIC void SPI_WriteData(uint32 data, uint32 data_len, uint32 dummy_bitlen)\r
{\r
- uint32 command;\r
volatile SPI_CTL_REG_T *spi_ctr_ptr = (volatile SPI_CTL_REG_T *)(SPI_USED_BASE);\r
\r
// The unit of data_len is identical with buswidth\r