sizeof(*cc), 64, &brw->cc.state_offset);
memset(cc, 0, sizeof(*cc));
- /* _NEW_STENCIL */
+ /* _NEW_STENCIL | _NEW_BUFFERS */
if (ctx->Stencil._Enabled) {
const unsigned back = ctx->Stencil._BackFace;
const struct brw_tracked_state brw_cc_unit = {
.dirty = {
- .mesa = _NEW_STENCIL | _NEW_COLOR | _NEW_DEPTH,
+ .mesa = _NEW_STENCIL | _NEW_COLOR | _NEW_DEPTH | _NEW_BUFFERS,
.brw = BRW_NEW_BATCH | BRW_NEW_STATS_WM,
.cache = CACHE_NEW_CC_VP
},
return;
}
- /* Mesa's Stencil._Enabled field is updated when
- * _NEW_BUFFERS | _NEW_STENCIL, but i965 code assumes that the value
- * only changes with _NEW_STENCIL (which seems sensible). So flag it
- * here since this is the _NEW_BUFFERS path.
- */
- intel->NewGLState |= (_NEW_DEPTH | _NEW_STENCIL);
+ intel->NewGLState |= _NEW_DEPTH;
/* The driver uses this in places that need to look up
* renderbuffers' buffer objects.
if (ctx->Depth.Test && ctx->Depth.Mask) /* ?? */
lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
- /* _NEW_STENCIL */
+ /* _NEW_STENCIL | _NEW_BUFFERS */
if (ctx->Stencil._Enabled) {
lookup |= IZ_STENCIL_TEST_ENABLE_BIT;
&brw->cc.depth_stencil_state_offset);
memset(ds, 0, sizeof(*ds));
- /* _NEW_STENCIL */
+ /* _NEW_STENCIL | _NEW_BUFFERS */
if (ctx->Stencil._Enabled) {
int back = ctx->Stencil._BackFace;