i965: Add chipset limits for the Haswell GT3 variant.

NOTE: This is a candidate for stable branches.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>

diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 4650553..5e6e97d 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -305,6 +305,12 @@ brwCreateContext(int api,
         brw->urb.size = 256;
         brw->urb.max_vs_entries = 1664;
         brw->urb.max_gs_entries = 640;
+      } else if (intel->gt == 3) {
+        brw->max_wm_threads = 408;
+        brw->max_vs_threads = 280;
+        brw->urb.size = 512;
+        brw->urb.max_vs_entries = 1664;
+        brw->urb.max_gs_entries = 640;
       }
    } else if (intel->gen == 7) {
       if (intel->gt == 1) {