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Revert "riscv: fix riscv64 unrecognized opcode build error"
30/296330/1
author
Jaehoon Chung
<jh80.chung@samsung.com>
Tue, 25 Jul 2023 21:32:45 +0000
(06:32 +0900)
committer
Jaehoon Chung
<jh80.chung@samsung.com>
Tue, 25 Jul 2023 22:11:03 +0000
(07:11 +0900)
Since using gcc13 to build Tizen RISCV, this patch doesn't need anymore.
This reverts commit
e6c19c8fe08eb4375c7f5da1d7004ae4c533d615
.
Change-Id: Iea9421a0c53ac3f9a9d9a8942dbf5a1521b91665
arch/riscv/Makefile
patch
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diff --git
a/arch/riscv/Makefile
b/arch/riscv/Makefile
index
4114bda
..
3cb876f
100644
(file)
--- a/
arch/riscv/Makefile
+++ b/
arch/riscv/Makefile
@@
-55,7
+55,6
@@
endif
riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima
riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima
riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd
-riscv-march-y := $(subst imafd,g,$(riscv-march-y))
riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c
ifdef CONFIG_TOOLCHAIN_NEEDS_OLD_ISA_SPEC