drm/amd/display: Add missing ODM 2:1 policy logic

Phantom pipes must use the same configuration used in main pipes. This
commit add this check.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Samson Tam <Samson.Tam@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
index 621767e..8224b9b 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
@@ -1269,7 +1269,6 @@ static void get_pixel_clock_parameters(
                pixel_clk_params->requested_pix_clk_100hz /= 4;
        else if (optc2_is_two_pixels_per_containter(&stream->timing) || opp_cnt == 2)
                pixel_clk_params->requested_pix_clk_100hz /= 2;
-
        else if (hws->funcs.is_dp_dig_pixel_rate_div_policy) {
                if (hws->funcs.is_dp_dig_pixel_rate_div_policy(pipe_ctx))
                        pixel_clk_params->requested_pix_clk_100hz /= 2;

diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
index 1f845e9..be2e3b9 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
@@ -1084,8 +1084,13 @@ unsigned int dcn32_calculate_dccg_k1_k2_values(struct pipe_ctx *pipe_ctx, unsign
        struct dc_stream_state *stream = pipe_ctx->stream;
        unsigned int odm_combine_factor = 0;
        struct dc *dc = pipe_ctx->stream->ctx->dc;
-       bool two_pix_per_container = optc2_is_two_pixels_per_containter(&stream->timing);
+       bool two_pix_per_container = false;
 
+       // For phantom pipes, use the same programming as the main pipes
+       if (pipe_ctx->stream->mall_stream_config.type == SUBVP_PHANTOM) {
+               stream = pipe_ctx->stream->mall_stream_config.paired_stream;
+       }
+       two_pix_per_container = optc2_is_two_pixels_per_containter(&stream->timing);
        odm_combine_factor = get_odm_config(pipe_ctx, NULL);
 
        if (is_dp_128b_132b_signal(pipe_ctx)) {