&clkc CLKID_MIPI_DSI_PHY
&clkc CLKID_DSI_MEAS_COMP
&clkc CLKID_VCLK2_ENCL
- &clkc CLKID_VCLK2_VENCL>;
+ &clkc CLKID_VCLK2_VENCL
+ &clkc CLKID_GP0_PLL>;
clock-names = "dsi_host_gate",
"dsi_phy_gate",
"dsi_meas",
"encl_top_gate",
- "encl_int_gate";
+ "encl_int_gate",
+ "gp0_pll";
reg = <0x0 0xffd07000 0x0 0x400 /* dsi_host */
0x0 0xff644000 0x0 0x200>; /* dsi_phy */
interrupts = <0 3 1>;
&clkc CLKID_MIPI_DSI_PHY
&clkc CLKID_DSI_MEAS_COMP
&clkc CLKID_VCLK2_ENCL
- &clkc CLKID_VCLK2_VENCL>;
+ &clkc CLKID_VCLK2_VENCL
+ &clkc CLKID_GP0_PLL>;
clock-names = "dsi_host_gate",
"dsi_phy_gate",
"dsi_meas",
"encl_top_gate",
- "encl_int_gate";
+ "encl_int_gate",
+ "gp0_pll";
reg = <0x0 0xffd07000 0x0 0x400 /* dsi_host */
0x0 0xff644000 0x0 0x200>; /* dsi_phy */
interrupts = <0 3 1>;
break;
case LCD_CHIP_G12A:
case LCD_CHIP_G12B:
+ if (lcd_drv->lcd_clk_path) {
+ if (IS_ERR(lcd_drv->gp0_pll))
+ LCDERR("%s: gp0_pll\n", __func__);
+ else
+ clk_prepare_enable(lcd_drv->gp0_pll);
+ }
+
if (IS_ERR(lcd_drv->dsi_host_gate))
LCDERR("%s: dsi_host_gate\n", __func__);
else
else
clk_disable_unprepare(
lcd_drv->encl_top_gate);
+
+ if (lcd_drv->lcd_clk_path) {
+ if (IS_ERR(lcd_drv->gp0_pll))
+ LCDERR("%s: gp0_pll\n", __func__);
+ else
+ clk_disable_unprepare(lcd_drv->gp0_pll);
+ }
break;
default:
if (IS_ERR(lcd_drv->encl_int_gate))
lcd_drv->dev, "encl_int_gate");
if (IS_ERR(lcd_drv->encl_int_gate))
LCDERR("%s: clk encl_int_gate\n", __func__);
+
+ lcd_drv->gp0_pll = devm_clk_get(lcd_drv->dev, "gp0_pll");
+ if (IS_ERR(lcd_drv->gp0_pll))
+ LCDERR("%s: clk gp0_pll\n", __func__);
break;
default:
lcd_drv->encl_top_gate = devm_clk_get(lcd_drv->dev,
devm_clk_put(lcd_drv->dev, lcd_drv->dsi_phy_gate);
if (!IS_ERR(lcd_drv->dsi_host_gate))
devm_clk_put(lcd_drv->dev, lcd_drv->dsi_host_gate);
+ if (!IS_ERR(lcd_drv->gp0_pll))
+ devm_clk_put(lcd_drv->dev, lcd_drv->gp0_pll);
break;
case LCD_CHIP_G12A:
case LCD_CHIP_G12B:
LCDPR("detect lcd_clk_path: %d\n", lcd_driver->lcd_clk_path);
}
+ ret = of_property_read_u32(lcd_driver->dev->of_node, "auto_test", &val);
+ if (ret) {
+ if (lcd_debug_print_flag)
+ LCDPR("failed to get auto_test\n");
+ lcd_driver->lcd_auto_test = 0;
+ } else {
+ lcd_driver->lcd_auto_test = (unsigned char)val;
+ LCDPR("detect lcd_auto_test: %d\n", lcd_driver->lcd_auto_test);
+ }
+
lcd_driver->lcd_info = &lcd_vinfo;
lcd_driver->lcd_config = &lcd_config_dft;
lcd_driver->lcd_test_state = 0;
};
#endif
+static struct delayed_work lcd_test_delayed_work;
+static void lcd_auto_test_delayed(struct work_struct *work)
+{
+ LCDPR("%s\n", __func__);
+ mutex_lock(&lcd_driver->power_mutex);
+ aml_lcd_notifier_call_chain(LCD_EVENT_POWER_ON, NULL);
+ mutex_unlock(&lcd_driver->power_mutex);
+}
+
+static void lcd_auto_test(unsigned char flag)
+{
+ lcd_driver->lcd_test_flag = flag;
+ if (lcd_driver->workqueue) {
+ queue_delayed_work(lcd_driver->workqueue,
+ &lcd_test_delayed_work,
+ msecs_to_jiffies(20000));
+ } else {
+ schedule_delayed_work(&lcd_test_delayed_work,
+ msecs_to_jiffies(20000));
+ }
+}
+
static int lcd_probe(struct platform_device *pdev)
{
const struct of_device_id *match;
/* init workqueue */
INIT_DELAYED_WORK(&lcd_driver->lcd_probe_delayed_work,
lcd_config_probe_delayed);
+ INIT_DELAYED_WORK(&lcd_test_delayed_work, lcd_auto_test_delayed);
lcd_driver->workqueue = create_singlethread_workqueue("lcd_work_queue");
if (lcd_driver->workqueue == NULL)
LCDERR("can't create lcd workqueue\n");
lcd_vsync_irq_init();
LCDPR("%s %s\n", __func__, (ret ? "failed" : "ok"));
+
+ if (lcd_driver->lcd_auto_test)
+ lcd_auto_test(lcd_driver->lcd_auto_test);
+
return 0;
}
unsigned char lcd_clk_path; /* 0=hpll, 1=gp0_pll */
unsigned char lcd_config_load;
unsigned char lcd_resume_type; /* 0=directly, 1=workqueue */
+ unsigned char lcd_auto_test;
unsigned char lcd_test_state;
unsigned char lcd_test_flag;
unsigned char lcd_mute_state;
struct clk *dsi_meas;
struct clk *mipi_enable_gate;
struct clk *mipi_bandgap_gate;
+ struct clk *gp0_pll;
struct device *dev;
struct lcd_config_s *lcd_config;