+2014-10-31 Torvald Riegel <triegel@redhat.com>
+
+ * sysdeps/sparc/sparc32/bits/atomic.h (atomic_write_barrier): Use
+ correct barrier instruction.
+ * sysdeps/sparc/sparc32/sparcv9/bits/atomic.h (atomic_write_barrier):
+ Likewise.
+ * sysdeps/sparc/sparc64/bits/atomic.h (atomic_write_barrier):
+ Likewise.
+
2014-10-30 Roland McGrath <roland@hack.frob.com>
* include/ctype.h: Include <ctype/ctype.h> first thing rather than
#define atomic_write_barrier() \
do { \
if (__atomic_is_v9) \
- /* membar #StoreLoad | #StoreStore */ \
- __asm __volatile (".word 0x8143e00a" : : : "memory"); \
+ /* membar #LoadStore | #StoreStore */ \
+ __asm __volatile (".word 0x8143e00c" : : : "memory"); \
else \
__asm __volatile ("" : : : "memory"); \
} while (0)
#define atomic_read_barrier() \
__asm __volatile ("membar #LoadLoad | #LoadStore" : : : "memory")
#define atomic_write_barrier() \
- __asm __volatile ("membar #StoreLoad | #StoreStore" : : : "memory")
+ __asm __volatile ("membar #LoadStore | #StoreStore" : : : "memory")
#define atomic_read_barrier() \
__asm __volatile ("membar #LoadLoad | #LoadStore" : : : "memory")
#define atomic_write_barrier() \
- __asm __volatile ("membar #StoreLoad | #StoreStore" : : : "memory")
+ __asm __volatile ("membar #LoadStore | #StoreStore" : : : "memory")