broadcom/qpu: update/remove comments

   * Remove one about waddr 6 being reserved, when at some point it
     become NOP

   * Fix one comment about reserved signals on v41 map, as 24 and 25
     are in fact defined. This seems a C&P issue (see v40 map).

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12301>

diff --git a/src/broadcom/qpu/qpu_instr.h b/src/broadcom/qpu/qpu_instr.h
index cf2576f..4f165e9 100644 (file)
--- a/src/broadcom/qpu/qpu_instr.h
+++ b/src/broadcom/qpu/qpu_instr.h
@@ -94,7 +94,6 @@ enum v3d_qpu_waddr {
         V3D_QPU_WADDR_R3 = 3,
         V3D_QPU_WADDR_R4 = 4,
         V3D_QPU_WADDR_R5 = 5,
-        /* 6 is reserved, but note 3.2.2.8: "Result Writes" */
         V3D_QPU_WADDR_NOP = 6,
         V3D_QPU_WADDR_TLB = 7,
         V3D_QPU_WADDR_TLBU = 8,

diff --git a/src/broadcom/qpu/qpu_pack.c b/src/broadcom/qpu/qpu_pack.c
index fa3bc87..788f2d7 100644 (file)
--- a/src/broadcom/qpu/qpu_pack.c
+++ b/src/broadcom/qpu/qpu_pack.c
@@ -207,9 +207,9 @@ static const struct v3d_qpu_sig v41_sig_map[] = {
         [21] = { THRSW,    LDVARY,        WRTMUC },
         [22] = { UCB,                     },
         [23] = { ROT,                     },
-        /* 24-30 reserved */
         [24] = {                   LDUNIFA},
         [25] = { LDUNIFARF                },
+        /* 26-30 reserved */
         [31] = { SMIMM,            LDTMU, },
 };