2004-02-04 Kazu Hirata <kazu@cs.umass.edu>
+ * config/darwin.c, config/darwin.h, config/freebsd-spec.h,
+ config/arm/arm.c, config/arm/arm.md,
+ config/cris/cris-protos.h, config/fr30/fr30.c,
+ config/fr30/fr30.h, config/h8300/h8300.c, config/i386/i386.h,
+ config/i860/i860.c, config/i860/i860.h, config/ia64/ia64-c.c,
+ config/ia64/ia64.c, config/ia64/ia64.h, config/ip2k/ip2k.h,
+ config/ip2k/ip2k.md, config/ip2k/libgcc.S,
+ config/m32r/linux.h, config/m32r/m32r.c, config/m32r/m32r.h,
+ config/m68k/m68k.c, config/m68k/netbsd-elf.h,
+ config/mips/mips.c, config/mmix/mmix.c, config/mmix/mmix.md,
+ config/ns32k/netbsd.h, config/ns32k/ns32k.c,
+ config/ns32k/ns32k.h, config/pdp11/pdp11.h,
+ config/rs6000/darwin-ldouble.c, config/s390/s390.h,
+ config/s390/s390.md, config/sparc/netbsd-elf.h,
+ config/sparc/openbsd.h, config/sparc/sparc.c,
+ config/xtensa/lib2funcs.S: Fix comment formatting.
+
+2004-02-04 Kazu Hirata <kazu@cs.umass.edu>
+
* config/alpha/alpha.c, config/arc/arc.c,
config/arm/arm-cores.def, config/arm/arm.c, config/arm/arm.h,
config/arm/arm1026ejs.md, config/arm/arm1136jfs.md,
case AND:
case XOR:
case IOR:
- /* XXX guess. */
+ /* XXX guess. */
return 8;
case ADDRESSOF:
? 4 : 0));
case IF_THEN_ELSE:
- /* XXX a guess. */
+ /* XXX a guess. */
if (GET_CODE (XEXP (x, 1)) == PC || GET_CODE (XEXP (x, 2)) == PC)
return 14;
return 2;
unsigned HOST_WIDE_INT masked_const;
/* The cost will be related to two insns.
- First a load of the constant (MOV or LDR), then a multiply. */
+ First a load of the constant (MOV or LDR), then a multiply. */
cost = 2;
if (! const_ok)
cost += 1; /* LDR is probably more expensive because
- of longer result latency. */
+ of longer result latency. */
masked_const = i & 0xffff8000;
if (masked_const != 0 && masked_const != 0xffff8000)
{
/* Ideally we shouldn't fail here if we could know that operands[1]
ends up already living in an iwmmxt register. Otherwise it's
cheaper to have the alternate code being generated than moving
- values to iwmmxt regs and back. */
+ values to iwmmxt regs and back. */
FAIL;
}
else if (!TARGET_REALLY_IWMMXT && !(TARGET_HARD_FLOAT && TARGET_MAVERICK))
/* Ideally we shouldn't fail here if we could know that operands[1]
ends up already living in an iwmmxt register. Otherwise it's
cheaper to have the alternate code being generated than moving
- values to iwmmxt regs and back. */
+ values to iwmmxt regs and back. */
FAIL;
}
else if (!TARGET_REALLY_IWMMXT)
/* Ideally we shouldn't fail here if we could know that operands[1]
ends up already living in an iwmmxt register. Otherwise it's
cheaper to have the alternate code being generated than moving
- values to iwmmxt regs and back. */
+ values to iwmmxt regs and back. */
FAIL;
}
else if (!TARGET_REALLY_IWMMXT)
extern void cris_pragma_expand_mul (struct cpp_reader *);
-/* Need one that returns an int; usable in expressions. */
+/* Need one that returns an int; usable in expressions. */
extern int cris_fatal (char *);
extern void cris_override_options (void);
&& name[5] == '_'));
tree temp;
- /* The PIC base symbol is always defined. */
+ /* The PIC base symbol is always defined. */
if (! strcmp (name, "<pic base>"))
return MACHOPIC_DEFINED_DATA;
{
const char *current_name;
- /* If dynamic-no-pic is on, we should not get here. */
+ /* If dynamic-no-pic is on, we should not get here. */
if (MACHO_DYNAMIC_NO_PIC_P)
abort ();
current_name =
/* Emit an assembler directive to set visibility for a symbol. Used
to support visibility attribute and Darwin's private extern
- feature. */
+ feature. */
#undef TARGET_ASM_ASSEMBLE_VISIBILITY
#define TARGET_ASM_ASSEMBLE_VISIBILITY darwin_assemble_visibility
save masks, and offsets for the current function. */
struct fr30_frame_info
{
- unsigned int total_size; /* # Bytes that the entire frame takes up. */
- unsigned int pretend_size; /* # Bytes we push and pretend caller did. */
- unsigned int args_size; /* # Bytes that outgoing arguments take up. */
- unsigned int reg_size; /* # Bytes needed to store regs. */
- unsigned int var_size; /* # Bytes that variables take up. */
+ unsigned int total_size; /* # Bytes that the entire frame takes up. */
+ unsigned int pretend_size; /* # Bytes we push and pretend caller did. */
+ unsigned int args_size; /* # Bytes that outgoing arguments take up. */
+ unsigned int reg_size; /* # Bytes needed to store regs. */
+ unsigned int var_size; /* # Bytes that variables take up. */
unsigned int frame_size; /* # Bytes in current frame. */
- unsigned int gmask; /* Mask of saved registers. */
- unsigned int save_fp; /* Nonzero if frame pointer must be saved. */
- unsigned int save_rp; /* Nonzero if return pointer must be saved. */
- int initialised; /* Nonzero if frame size already calculated. */
+ unsigned int gmask; /* Mask of saved registers. */
+ unsigned int save_fp; /* Nonzero if frame pointer must be saved. */
+ unsigned int save_rp; /* Nonzero if return pointer must be saved. */
+ int initialised; /* Nonzero if frame size already calculated. */
};
/* Current frame information calculated by fr30_compute_frame_size(). */
statement is probably unnecessary. */
if (targetm.calls.strict_argument_naming (&arg_regs_used_so_far))
/* If TARGET_STRICT_ARGUMENT_NAMING returns true, then the last named
- arg must not be treated as an anonymous arg. */
+ arg must not be treated as an anonymous arg. */
arg_regs_used_so_far += fr30_num_arg_regs (int_mode, type);
size = FR30_NUM_ARG_REGS - arg_regs_used_so_far;
/* Define this to be a string constant containing `-D' options to define the
predefined macros that identify this machine and system. These macros will
- be predefined unless the `-ansi' option is specified. */
+ be predefined unless the `-ansi' option is specified. */
#define TARGET_CPU_CPP_BUILTINS() \
do \
- if the type has variable size
- if the type is marked as addressable (it is required to be constructed
into the stack)
- - if the type is a structure or union. */
+ - if the type is a structure or union. */
#define MUST_PASS_IN_STACK(MODE, TYPE) \
(((MODE) == BLKmode) \
#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RETURN_VALUE_REGNUM)
/* A C expression that is nonzero if REGNO is the number of a hard register in
- which the values of called function may come back. */
+ which the values of called function may come back. */
#define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == RETURN_VALUE_REGNUM)
} \
while (0)
-/* Define the default FreeBSD-specific per-CPU hook code. */
+/* Define the default FreeBSD-specific per-CPU hook code. */
#define FBSD_TARGET_CPU_CPP_BUILTINS() do {} while (0)
/* Provide a CPP_SPEC appropriate for FreeBSD. We just deal with the GCC
int
h8300_eightbit_constant_address_p (rtx x)
{
- /* The ranges of the 8-bit area. */
+ /* The ranges of the 8-bit area. */
const unsigned HOST_WIDE_INT n1 = trunc_int_for_mode (0xff00, HImode);
const unsigned HOST_WIDE_INT n2 = trunc_int_for_mode (0xffff, HImode);
const unsigned HOST_WIDE_INT h1 = trunc_int_for_mode (0x00ffff00, SImode);
been eliminated by then. */
-/* Non strict versions, pseudos are ok */
+/* Non strict versions, pseudos are ok. */
#define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
(REGNO (X) < STACK_POINTER_REGNUM \
|| (REGNO (X) >= FIRST_REX_INT_REG \
output_asm_insn ("bla %5,%2,.Lm%3", xoperands);
output_asm_insn ("adds %0,%2,%6", xoperands);
output_asm_insn ("\n.Lm%3:", xoperands); /* Label for bla above. */
- output_asm_insn ("\n.Ls%3:", xoperands); /* Loop start label. */
+ output_asm_insn ("\n.Ls%3:", xoperands); /* Loop start label. */
output_asm_insn ("adds %5,%6,%6", xoperands);
/* NOTE: The code here which is supposed to handle the cases where the
/* Define as C expression which evaluates to nonzero if the tablejump
instruction expects the table to contain offsets from the address of the
table.
- Do not define this if the table should contain absolute addresses. */
+ Do not define this if the table should contain absolute addresses. */
/* #define CASE_VECTOR_PC_RELATIVE 1 */
/* Define this as 1 if `char' should by default be signed; else as 0. */
typedef struct c89_mathlib_names
{
const char *realname; /* User visible function name. */
- const char *c89name; /* libm special name needed to set errno. */
+ const char *c89name; /* libm special name needed to set errno. */
} c89_mathlib_names;
static const c89_mathlib_names c89_mathlib_name_list [] =
{
/* Again the postmodify cannot be made to match, but
in this case it's more efficient to get rid of the
- postmodify entirely and fix up with an add insn. */
+ postmodify entirely and fix up with an add insn. */
out[1] = adjust_automodify_address (in, DImode, base, 8);
fixup = gen_adddi3 (base, base,
GEN_INT (INTVAL (XEXP (offset, 1)) - 8));
initiate_bundle_state_table ();
index_to_bundle_states = xmalloc ((insn_num + 2)
* sizeof (struct bundle_state *));
- /* First (forward) pass -- generation of bundle states. */
+ /* First (forward) pass -- generation of bundle states. */
curr_state = get_free_bundle_state ();
curr_state->insn = NULL;
curr_state->before_nops_num = 0;
/* The following function returns TRUE if INSN produces address for a
load/store insn. We will place such insns into M slot because it
- decreases its latency time. */
+ decreases its latency time. */
int
ia64_produce_address_p (rtx insn)
#define MASK_INLINE_SQRT_LAT 0x00008000 /* inline sqrt, min latency. */
-#define MASK_INLINE_SQRT_THR 0x00010000 /* inline sqrt, max throughput. */
+#define MASK_INLINE_SQRT_THR 0x00010000 /* inline sqrt, max throughput. */
#define MASK_DWARF2_ASM 0x00020000 /* test dwarf2 line info via gas. */
enum processor_type
{
- PROCESSOR_ITANIUM, /* Original Itanium. */
+ PROCESSOR_ITANIUM, /* Original Itanium. */
PROCESSOR_ITANIUM2,
PROCESSOR_max
};
#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
-/* Miscellaneous macros to describe machine specifics. */
+/* Miscellaneous macros to describe machine specifics. */
#define IS_PSEUDO_P(R) (REGNO (R) >= FIRST_PSEUDO_REGISTER)
0xff & ~mask);
if (CONSTANT_P (operands[3]))
- /* Constant can just be or-ed in. */
+ /* Constant can just be or-ed in. */
{
p += sprintf (p, \"mov\\tw,#$%2.2x\;or\\t%%0,w\",
(int) (INTVAL (operands[3]) << pos) & mask & 0xff);
p += sprintf (p, \"mov\\tw,%%3\;\"); /* Value to deposit */
- /* Shift and mask the value before OR-ing into the destination. */
+ /* Shift and mask the value before OR-ing into the destination. */
if (pos != 0)
p += sprintf (p, \"mulu\\tw,#%d\;\", 1<<pos);
{
/* It is not impossible to wind up with two constants here.
If we simply emit the ashl, we'll generate unrecognizable
- instructions. */
+ instructions. */
if (! nonimmediate_operand (operands[1], HImode))
operands[1] = copy_to_mode_reg (HImode, operands[1]);
emit_insn (gen_ashlhi3 (operands[0], operands[1], const1_rtx));
#endif
#if defined(Lwrite)
- /* Dummy entrypoint to suppress problems with glue code. */
+ /* Dummy entrypoint to suppress problems with glue code. */
.sect .text.libgcc,"ax"
.global _write
.func write, _write
When the -shared link option is used a final link is not being
done. */
-/* If ELF is the default format, we should not use /lib/elf. */
+/* If ELF is the default format, we should not use /lib/elf. */
#undef LINK_SPEC
#if TARGET_LITTLE_ENDIAN
}
\f
/* Do any necessary cleanup after a function to restore stack, frame,
- and regs. */
+ and regs. */
static void
m32r_output_function_epilogue (FILE * file, HOST_WIDE_INT size ATTRIBUTE_UNUSED)
}
/* Returns true if the registers contained in the two
- rtl expressions are different. */
+ rtl expressions are different. */
int
m32r_not_same_reg (rtx a, rtx b)
SIZE is the number of bytes of arguments passed on the stack. */
#define RETURN_POPS_ARGS(DECL, FUNTYPE, SIZE) 0
-/* Nonzero if we do not know how to pass TYPE solely in registers. */
+/* Nonzero if we do not know how to pass TYPE solely in registers. */
#define MUST_PASS_IN_STACK(MODE, TYPE) \
((TYPE) != 0 \
&& (TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST \
/* Define as C expression which evaluates to nonzero if the tablejump
instruction expects the table to contain offsets from the address of the
table.
- Do not define this if the table should contain absolute addresses. */
+ Do not define this if the table should contain absolute addresses. */
/* It's not clear what PIC will look like or whether we want to use -fpic
for the embedded form currently being talked about. For now require -fpic
to get pc relative switch tables. */
#endif
-/* Structure describing stack frame layout. */
+/* Structure describing stack frame layout. */
struct m68k_frame
{
/* Stack pointer to frame pointer offset. */
function. VALTYPE is the data type of the value (as a tree). If
the precise function being called is known, FUNC is its
FUNCTION_DECL; otherwise, FUNC is 0. For m68k/SVR4 generate the
- result in d0, a0, or fp0 as appropriate. */
+ result in d0, a0, or fp0 as appropriate. */
#undef FUNCTION_VALUE
#define FUNCTION_VALUE(VALTYPE, FUNC) \
/* Boundary (in *bits*) on which stack pointer should be aligned.
- The m68k/SVR4 convention is to keep the stack pointer longword aligned. */
+ The m68k/SVR4 convention is to keep the stack pointer longword aligned. */
#undef STACK_BOUNDARY
#define STACK_BOUNDARY 32
/* Alignment of field after `int : 0' in a structure.
- For m68k/SVR4, this is the next longword boundary. */
+ For m68k/SVR4, this is the next longword boundary. */
#undef EMPTY_FIELD_BOUNDARY
#define EMPTY_FIELD_BOUNDARY 32
/* For m68k SVR4, structures are returned using the reentrant
- technique. */
+ technique. */
#undef PCC_STATIC_STRUCT_RETURN
if (mode == VOIDmode)
mode = GET_MODE (cmp1);
- /* Eliminate simple branches */
+ /* Eliminate simple branches. */
branch_p = (result == 0);
if (branch_p)
{
if (GET_CODE (cmp0) == REG || GET_CODE (cmp0) == SUBREG)
{
- /* Comparisons against zero are simple branches */
+ /* Comparisons against zero are simple branches. */
if (GET_CODE (cmp1) == CONST_INT && INTVAL (cmp1) == 0
&& (! TARGET_MIPS16 || eqne_p))
return 0;
/* DATA_ALIGNMENT.
We have trouble getting the address of stuff that is located at other
than 32-bit alignments (GETA requirements), so try to give everything
- at least 32-bit alignment. */
+ at least 32-bit alignment. */
int
mmix_data_alignment (tree type ATTRIBUTE_UNUSED, int basic_align)
fputs ("! mmixal:= 8H LOC Data_Section\n", asm_out_file);
- /* Make sure each file starts with the text section. */
+ /* Make sure each file starts with the text section. */
text_section ();
}
static void
mmix_file_end (void)
{
- /* Make sure each file ends with the data section. */
+ /* Make sure each file ends with the data section. */
data_section ();
}
= mmix_gen_compare_reg (LE, mmix_compare_op0, mmix_compare_op1);
/* The head comment of optabs.c:can_compare_p says we're required to
- implement this, so we have to clean up the mess here. */
+ implement this, so we have to clean up the mess here. */
if (operands[1] == NULL_RTX)
{
/* FIXME: Watch out for sharing/unsharing of rtx:es. */
= mmix_gen_compare_reg (GE, mmix_compare_op0, mmix_compare_op1);
/* The head comment of optabs.c:can_compare_p says we're required to
- implement this, so we have to clean up the mess here. */
+ implement this, so we have to clean up the mess here. */
if (operands[1] == NULL_RTX)
{
/* FIXME: Watch out for sharing/unsharing of rtx:es. */
/* 32532 spec says it can handle any alignment. Rumor from tm-ns32k.h
tells this might not be actually true (but it's for 32032, perhaps
National has fixed the bug for 32532). You might have to change this
- if the bug still exists. */
+ if the bug still exists. */
#undef STRICT_ALIGNMENT
#define STRICT_ALIGNMENT 0
#if 0
/* We made the insn definitions copy from floating point to general
- registers via the stack. */
+ registers via the stack. */
int
secondary_memory_needed (enum reg_class CLASS1,
enum reg_class CLASS2,
/* TARGET_ADDRESS_COST calls this. This function is not optimal
for the 32032 & 32332, but it probably is better than
- the default. */
+ the default. */
static int
ns32k_address_cost (rtx operand)
/* Use movmd. It is slower than multiple movd's but more
compact. It is also slower than movsd for large copies
but causes less registers reloading so is better than movsd
- for small copies. */
+ for small copies. */
rtx src, dest;
dest = copy_addr_to_reg (XEXP (operands[0], 0));
src = copy_addr_to_reg (XEXP (operands[1], 0));
else if (TARGET_32081) \
builtin_define ("__ns32081__"); \
\
- /* Misc. */ \
+ /* Misc. */ \
if (TARGET_RTD) \
builtin_define ("__RTD__"); \
\
/* ABSOLUTE PREFIX, IMMEDIATE_PREFIX and EXTERNAL_PREFIX can be defined
to cover most NS32k addressing syntax variations. This way we don't
need to redefine long macros in all the tm.h files for just slight
- variations in assembler syntax. */
+ variations in assembler syntax. */
#ifndef ABSOLUTE_PREFIX
#define ABSOLUTE_PREFIX '@'
/* NS32000 pc is not overloaded on a register. */
/* #define PC_REGNUM */
-/* Register to use for pushing function arguments. */
+/* Register to use for pushing function arguments. */
#define STACK_POINTER_REGNUM 25
-/* Base register for access to local variables of the function. */
+/* Base register for access to local variables of the function. */
#define FRAME_POINTER_REGNUM 24
/* Value is 1 if it is a good idea to tie two pseudo registers
when one has mode MODE1 and one has mode MODE2.
If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
- for any hard reg, then this must be 0 for correct output. */
+ for any hard reg, then this must be 0 for correct output. */
#define MODES_TIEABLE_P(MODE1, MODE2) \
((FLOAT_MODE_P(MODE1) && FLOAT_MODE_P(MODE2) \
/* Specify the machine mode that this machine uses
for the index in the tablejump instruction.
HI mode is more efficient but the range is not wide enough for
- all programs. */
+ all programs. */
#define CASE_VECTOR_MODE SImode
/* Define as C expression which evaluates to nonzero if the tablejump
instruction expects the table to contain offsets from the address of the
table.
- Do not define this if the table should contain absolute addresses. */
+ Do not define this if the table should contain absolute addresses. */
#define CASE_VECTOR_PC_RELATIVE 1
/* Define this as 1 if `char' should by default be signed; else as 0. */
/* This is how to output an assembler line defining an external/static
address which is not in tree format (for collect.c). */
-/* The prefix to add to user-visible assembler symbols. */
+/* The prefix to add to user-visible assembler symbols. */
#define USER_LABEL_PREFIX "_"
/* This is how to output an insn to push a register on the stack.
/* Define this if most significant word of a multiword number is first. */
#define WORDS_BIG_ENDIAN 1
-/* Define that floats are in VAX order, not high word first as for ints. */
+/* Define that floats are in VAX order, not high word first as for ints. */
#define FLOAT_WORDS_BIG_ENDIAN 0
/* Width of a word, in units (bytes).
/* Define as C expression which evaluates to nonzero if the tablejump
instruction expects the table to contain offsets from the address of the
table.
- Do not define this if the table should contain absolute addresses. */
+ Do not define this if the table should contain absolute addresses. */
/* #define CASE_VECTOR_PC_RELATIVE 1 */
/* Define this as 1 if `char' should by default be signed; else as 0. */
/* Give a comparison code (EQ, NE etc) and the first operand of a COMPARE,
return the mode to be used for the comparison. For floating-point, CCFPmode
- should be used. */
+ should be used. */
#define SELECT_CC_MODE(OP,X,Y) \
(GET_MODE_CLASS(GET_MODE(X)) == MODE_FLOAT? CCFPmode : CCmode)
/* Globalizing directive for a label. */
#define GLOBAL_ASM_OP "\t.globl "
-/* The prefix to add to user-visible assembler symbols. */
+/* The prefix to add to user-visible assembler symbols. */
#define USER_LABEL_PREFIX "_"
fprintf (FILE, "\t%sL_%d\n", TARGET_UNIX_ASM ? "" : ".word ", VALUE)
/* This is how to output an element of a case-vector that is relative.
- Don't define this if it is not supported. */
+ Don't define this if it is not supported. */
/* #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) */
d = tau;
}
- /* b <- second largest magnitude double. */
+ /* b <- second largest magnitude double. */
if (fabs (c) > fabs (b))
{
t = b;
}
/* Thanks to commutativity, sum is invariant w.r.t. the next
- conditional exchange. */
+ conditional exchange. */
tau = d + c;
/* Order the smallest magnitude doubles. */
/* Finite nonzero result requires corrections to the highest order term. */
- s = c * t; /* (s,sigma) = c*t exactly. */
+ s = c * t; /* (s,sigma) = c*t exactly. */
w = -(-b + d * t); /* Written to get fnmsub for speed, but not
numerically necessary. */
asm ("fmsub %0,%1,%2,%3" : "=f"(sigma) : "f"(c), "f"(t), "f"(s));
v = a - s;
- tau = ((v-sigma)+w)/c; /* Correction to t. */
+ tau = ((v-sigma)+w)/c; /* Correction to t. */
u = t + tau;
- /* Construct long double result. */
+ /* Construct long double result. */
z.dval[0] = u;
z.dval[1] = (t - u) + tau;
return z.ldval;
#define SLOW_BYTE_ACCESS 1
/* The maximum number of bytes that a single instruction can move quickly
- between memory and registers or between two memory locations. */
+ between memory and registers or between two memory locations. */
#define MOVE_MAX (TARGET_64BIT ? 16 : 8)
#define MAX_MOVE_MAX 16
rtx temp = gen_reg_rtx (Pmode);
/* Copy the backchain to the first word, sp to the second and the literal pool
- base to the third. */
+ base to the third. */
emit_move_insn (operand_subword (operands[0], 2, 0,
TARGET_64BIT ? OImode : TImode),
gen_rtx_REG (Pmode, BASE_REGISTER));
rtx base = gen_rtx_REG (Pmode, BASE_REGISTER);
/* Restore the backchain from the first word, sp from the second and the
- literal pool base from the third. */
+ literal pool base from the third. */
emit_move_insn (temp,
operand_subword (operands[1], 0, 0,
TARGET_64BIT ? OImode : TImode));
#define MULTILIB_DEFAULTS { "m64" }
#endif
-/* Name the port. */
+/* Name the port. */
#undef TARGET_NAME
#define TARGET_NAME (DEFAULT_ARCH32_P ? TARGET_NAME32 : TARGET_NAME64)
/* Assembler format: exception region output. */
/* All configurations that don't use elf must be explicit about not using
- dwarf unwind information. */
+ dwarf unwind information. */
#define DWARF2_UNWIND_INFO 0
#undef ASM_PREFERRED_EH_DATA_FORMAT
/* Use the subroutines that Sun's library provides for integer
multiply and divide. The `*' prevents an underscore from
being prepended by the compiler. .umul is a little faster
- than .mul. */
+ than .mul. */
set_optab_libfunc (smul_optab, SImode, "*.umul");
set_optab_libfunc (sdiv_optab, SImode, "*.div");
set_optab_libfunc (udiv_optab, SImode, "*.udiv");
return true;
case IF_THEN_ELSE:
- /* Conditional moves. */
+ /* Conditional moves. */
switch (sparc_cpu)
{
case PROCESSOR_ULTRASPARC:
/* __xtensa_libgcc_window_spill: This function flushes out all but the
current register window. This is used to set up the stack so that
- arbitrary frames can be accessed. */
+ arbitrary frames can be accessed. */
.align 4
.global __xtensa_libgcc_window_spill
function. This can be extracted from the high bits of the
return address, initially in a0. As the unwinding
proceeds, the window size is taken from the value of a0
- saved _two_ frames below the current frame. */
+ saved _two_ frames below the current frame. */
addi a5, sp, -16 # a5 = prev - save area
l32i a6, a5, 4
current sp so they will be reloaded when the return from this
function underflows. We don't have to worry about exceptions
while updating the current save area, because the windows have
- already been flushed. */
+ already been flushed. */
addi a4, sp, -16 # a4 = save area of this function
l32i a6, a5, 0
s32i a7, a4, 12
/* Set return address to goto handler. Use the window size bits
- from the return address two frames below the target. */
+ from the return address two frames below the target. */
extui a8, a8, 30, 2 # get window size from return addr.
slli a3, a3, 2 # get goto handler addr. << 2
ssai 2
At least one IHI instruction is needed for each i-cache line which may
be touched by the trampoline. An ISYNC instruction is also needed to
make sure that the modified instructions are loaded into the instruction
- fetch buffer. */
+ fetch buffer. */
#define TRAMPOLINE_SIZE 59
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