vc4: Store the (currently always linear) tiling format in the resource.

diff --git a/src/gallium/drivers/vc4/vc4_context.c b/src/gallium/drivers/vc4/vc4_context.c
index 6991e6a..ffcbbb2 100644 (file)
--- a/src/gallium/drivers/vc4/vc4_context.c
+++ b/src/gallium/drivers/vc4/vc4_context.c
@@ -113,7 +113,8 @@ vc4_setup_rcl(struct vc4_context *vc4)
         cl_reloc(vc4, &vc4->rcl, ctex->bo, csurf->offset);
         cl_u16(&vc4->rcl, width);
         cl_u16(&vc4->rcl, height);
-        cl_u16(&vc4->rcl, (VC4_RENDER_CONFIG_MEMORY_FORMAT_LINEAR |
+        cl_u16(&vc4->rcl, ((ctex->tiling <<
+                            VC4_RENDER_CONFIG_MEMORY_FORMAT_SHIFT) |
                            VC4_RENDER_CONFIG_FORMAT_RGBA8888 |
                            VC4_RENDER_CONFIG_EARLY_Z_COVERAGE_DISABLE));
 
@@ -145,7 +146,8 @@ vc4_setup_rcl(struct vc4_context *vc4)
                                 cl_u8(&vc4->rcl, VC4_PACKET_LOAD_TILE_BUFFER_GENERAL);
                                 cl_u8(&vc4->rcl,
                                       VC4_LOADSTORE_TILE_BUFFER_COLOR |
-                                      VC4_LOADSTORE_TILE_BUFFER_FORMAT_RASTER);
+                                      (ctex->tiling <<
+                                       VC4_LOADSTORE_TILE_BUFFER_FORMAT_SHIFT));
                                 cl_u8(&vc4->rcl,
                                       VC4_LOADSTORE_TILE_BUFFER_RGBA8888);
                                 cl_reloc(vc4, &vc4->rcl, ctex->bo,

diff --git a/src/gallium/drivers/vc4/vc4_packet.h b/src/gallium/drivers/vc4/vc4_packet.h
index 35ce730..732463c 100644 (file)
--- a/src/gallium/drivers/vc4/vc4_packet.h
+++ b/src/gallium/drivers/vc4/vc4_packet.h
@@ -82,6 +82,15 @@ enum vc4_packet {
 } __attribute__ ((__packed__));
 
 /** @{
+ * Bits used by packets like VC4_PACKET_STORE_TILE_BUFFER_GENERAL and
+ * VC4_PACKET_TILE_RENDERING_MODE_CONFIG.
+*/
+#define VC4_TILING_FORMAT_LINEAR    0
+#define VC4_TILING_FORMAT_T         1
+#define VC4_TILING_FORMAT_LT        2
+/** @} */
+
+/** @{
  *
  * byte 2 of VC4_PACKET_STORE_TILE_BUFFER_GENERAL and
  * VC4_PACKET_LOAD_TILE_BUFFER_GENERAL (low bits of the address)
@@ -106,6 +115,7 @@ enum vc4_packet {
 #define VC4_LOADSTORE_TILE_BUFFER_RGBA8888         (0 << 0)
 #define VC4_LOADSTORE_TILE_BUFFER_BGR565_DITHER    (1 << 0)
 #define VC4_LOADSTORE_TILE_BUFFER_BGR565           (2 << 0)
+#define VC4_LOADSTORE_TILE_BUFFER_MASK             (3 << 0)
 /** @} */
 
 /** @{
@@ -117,9 +127,10 @@ enum vc4_packet {
 #define VC4_STORE_TILE_BUFFER_MODE_DECIMATE_X4     (1 << 6)
 #define VC4_STORE_TILE_BUFFER_MODE_DECIMATE_X16    (2 << 6)
 
-#define VC4_LOADSTORE_TILE_BUFFER_FORMAT_RASTER    (0 << 4)
-#define VC4_LOADSTORE_TILE_BUFFER_FORMAT_T         (1 << 4)
-#define VC4_LOADSTORE_TILE_BUFFER_FORMAT_LT        (2 << 4)
+/** The values of the field are VC4_TILING_FORMAT_* */
+#define VC4_LOADSTORE_TILE_BUFFER_FORMAT_MASK      (3 << 4)
+#define VC4_LOADSTORE_TILE_BUFFER_FORMAT_SHIFT     4
+
 
 #define VC4_LOADSTORE_TILE_BUFFER_NONE             (0 << 0)
 #define VC4_LOADSTORE_TILE_BUFFER_COLOR            (1 << 0)
@@ -194,9 +205,9 @@ enum vc4_packet {
 #define VC4_RENDER_CONFIG_COVERAGE_MODE            (1 << 9)
 #define VC4_RENDER_CONFIG_ENABLE_VG_MASK           (1 << 8)
 
-#define VC4_RENDER_CONFIG_MEMORY_FORMAT_LINEAR     (0 << 6)
-#define VC4_RENDER_CONFIG_MEMORY_FORMAT_T          (1 << 6)
-#define VC4_RENDER_CONFIG_MEMORY_FORMAT_LT         (2 << 6)
+/** The values of the field are VC4_TILING_FORMAT_* */
+#define VC4_RENDER_CONFIG_MEMORY_FORMAT_MASK       (3 << 6)
+#define VC4_RENDER_CONFIG_MEMORY_FORMAT_SHIFT      6
 
 #define VC4_RENDER_CONFIG_DECIMATE_MODE_1X         (0 << 4)
 #define VC4_RENDER_CONFIG_DECIMATE_MODE_4X         (1 << 4)

diff --git a/src/gallium/drivers/vc4/vc4_resource.c b/src/gallium/drivers/vc4/vc4_resource.c
index 3b1abd1..3dad566 100644 (file)
--- a/src/gallium/drivers/vc4/vc4_resource.c
+++ b/src/gallium/drivers/vc4/vc4_resource.c
@@ -181,6 +181,7 @@ vc4_resource_create(struct pipe_screen *pscreen,
 
         vc4_setup_slices(rsc);
 
+        rsc->tiling = VC4_TILING_FORMAT_LINEAR;
         rsc->bo = vc4_bo_alloc(vc4_screen(pscreen),
                                rsc->slices[0].offset +
                                rsc->slices[0].size0 * prsc->depth0,
@@ -206,6 +207,7 @@ vc4_resource_from_handle(struct pipe_screen *pscreen,
         if (!rsc)
                 return NULL;
 
+        rsc->tiling = VC4_TILING_FORMAT_LINEAR;
         rsc->bo = vc4_screen_bo_from_handle(pscreen, handle, &slice->stride);
         if (!rsc->bo)
                 goto fail;

diff --git a/src/gallium/drivers/vc4/vc4_resource.h b/src/gallium/drivers/vc4/vc4_resource.h
index 664e8bf..34ca7ec 100644 (file)
--- a/src/gallium/drivers/vc4/vc4_resource.h
+++ b/src/gallium/drivers/vc4/vc4_resource.h
@@ -48,6 +48,8 @@ struct vc4_resource {
         struct vc4_bo *bo;
         struct vc4_resource_slice slices[VC4_MAX_MIP_LEVELS];
         int cpp;
+        /** One of VC4_TILING_FORMAT_* */
+        uint8_t tiling;
 };
 
 static INLINE struct vc4_resource *