drm/i915/gt: Use MEDIA_VER() when handling media fuses

Check for media IP version instead of graphics since this is figuring
out the media engines' configuration. Currently the only platform with
non-matching graphics/media version is Meteor Lake: update the check in
gen11_vdbox_has_sfc() so it considers not only version 12, but also any
later version which then includes that platform.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220909-media-v2-1-6f20f322b4ef@intel.com

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 6e0122b..b660243 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -654,13 +654,12 @@ bool gen11_vdbox_has_sfc(struct intel_gt *gt,
         */
        if ((gt->info.sfc_mask & BIT(physical_vdbox / 2)) == 0)
                return false;
-       else if (GRAPHICS_VER(i915) == 12)
+       else if (MEDIA_VER(i915) >= 12)
                return (physical_vdbox % 2 == 0) ||
                        !(BIT(physical_vdbox - 1) & vdbox_mask);
-       else if (GRAPHICS_VER(i915) == 11)
+       else if (MEDIA_VER(i915) == 11)
                return logical_vdbox % 2 == 0;
 
-       MISSING_CASE(GRAPHICS_VER(i915));
        return false;
 }
 
@@ -747,14 +746,14 @@ static intel_engine_mask_t init_engine_mask(struct intel_gt *gt)
         * and bits have disable semantices.
         */
        media_fuse = intel_uncore_read(uncore, GEN11_GT_VEBOX_VDBOX_DISABLE);
-       if (GRAPHICS_VER_FULL(i915) < IP_VER(12, 50))
+       if (MEDIA_VER_FULL(i915) < IP_VER(12, 50))
                media_fuse = ~media_fuse;
 
        vdbox_mask = media_fuse & GEN11_GT_VDBOX_DISABLE_MASK;
        vebox_mask = (media_fuse & GEN11_GT_VEBOX_DISABLE_MASK) >>
                      GEN11_GT_VEBOX_DISABLE_SHIFT;
 
-       if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50)) {
+       if (MEDIA_VER_FULL(i915) >= IP_VER(12, 50)) {
                fuse1 = intel_uncore_read(uncore, HSW_PAVP_FUSE1);
                gt->info.sfc_mask = REG_FIELD_GET(XEHP_SFC_ENABLE_MASK, fuse1);
        } else {