ice: Fix DSCP PFC TLV creation
authorDave Ertman <david.m.ertman@intel.com>
Fri, 27 Jan 2023 13:24:10 +0000 (14:24 +0100)
committerTony Nguyen <anthony.l.nguyen@intel.com>
Tue, 7 Mar 2023 21:02:01 +0000 (13:02 -0800)
When creating the TLV to send to the FW for configuring DSCP mode PFC,the
PFCENABLE field was being masked with a 4 bit mask (0xF), but this is an 8
bit bitmask for enabled classes for PFC.  This means that traffic classes
4-7 could not be enabled for PFC.

Remove the mask completely, as it is not necessary, as we are assigning 8
bits to an 8 bit field.

Fixes: 2a87bd73e50d ("ice: Add DSCP support")
Signed-off-by: Dave Ertman <david.m.ertman@intel.com>
Signed-off-by: Karen Ostrowska <karen.ostrowska@intel.com>
Tested-by: Gurucharan G <gurucharanx.g@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
drivers/net/ethernet/intel/ice/ice_dcb.c

index c557dfc..396e555 100644 (file)
@@ -1411,7 +1411,7 @@ ice_add_dscp_pfc_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
        tlv->ouisubtype = htonl(ouisubtype);
 
        buf[0] = dcbcfg->pfc.pfccap & 0xF;
-       buf[1] = dcbcfg->pfc.pfcena & 0xF;
+       buf[1] = dcbcfg->pfc.pfcena;
 }
 
 /**