soundwire: intel: regroup definitions for LCTL

No functionality change, just regroup offset and bitfield definitions.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Link: https://lore.kernel.org/r/20220823053846.2684635-3-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/include/linux/soundwire/sdw_intel.h b/include/linux/soundwire/sdw_intel.h
index 49a3c26..d9f51f4 100644 (file)
--- a/include/linux/soundwire/sdw_intel.h
+++ b/include/linux/soundwire/sdw_intel.h
@@ -19,7 +19,14 @@
 #define SDW_SHIM_LCAP                  0x0
 #define SDW_SHIM_LCAP_LCOUNT_MASK      GENMASK(2, 0)
 
+/* LCTL */
 #define SDW_SHIM_LCTL                  0x4
+
+#define SDW_SHIM_LCTL_SPA              BIT(0)
+#define SDW_SHIM_LCTL_SPA_MASK         GENMASK(3, 0)
+#define SDW_SHIM_LCTL_CPA              BIT(8)
+#define SDW_SHIM_LCTL_CPA_MASK         GENMASK(11, 8)
+
 #define SDW_SHIM_IPPTR                 0x8
 #define SDW_SHIM_SYNC                  0xC
 
@@ -39,11 +46,6 @@
 #define SDW_SHIM_WAKEEN                        0x190
 #define SDW_SHIM_WAKESTS               0x192
 
-#define SDW_SHIM_LCTL_SPA              BIT(0)
-#define SDW_SHIM_LCTL_SPA_MASK         GENMASK(3, 0)
-#define SDW_SHIM_LCTL_CPA              BIT(8)
-#define SDW_SHIM_LCTL_CPA_MASK         GENMASK(11, 8)
-
 #define SDW_SHIM_SYNC_SYNCPRD_VAL_24   (24000 / SDW_CADENCE_GSYNC_KHZ - 1)
 #define SDW_SHIM_SYNC_SYNCPRD_VAL_38_4 (38400 / SDW_CADENCE_GSYNC_KHZ - 1)
 #define SDW_SHIM_SYNC_SYNCPRD          GENMASK(14, 0)