ARM: imx: imx8mn-ddr4-evk: Add ethernet support
authorMarek Vasut <marex@denx.de>
Sat, 19 Feb 2022 16:13:54 +0000 (17:13 +0100)
committerStefano Babic <sbabic@denx.de>
Sat, 19 Feb 2022 22:32:23 +0000 (23:32 +0100)
Add support for ethernet on the imx8mn-ddr4-evk.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
arch/arm/dts/imx8mn-evk.dtsi
board/freescale/imx8mn_evk/imx8mn_evk.c
configs/imx8mn_ddr4_evk_defconfig

index 76d042a..416fadb 100644 (file)
@@ -53,6 +53,7 @@
        pinctrl-0 = <&pinctrl_fec1>;
        phy-mode = "rgmii-id";
        phy-handle = <&ethphy0>;
+       phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
        fsl,magic-packet;
        status = "okay";
 
index 9a0a048..b24342f 100644 (file)
@@ -7,17 +7,47 @@
 #include <env.h>
 #include <init.h>
 #include <asm/global_data.h>
+#include <miiphy.h>
+#include <netdev.h>
+#include <asm/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int board_init(void)
+int board_mmc_get_env_dev(int devno)
 {
+       return devno;
+}
+
+static void setup_fec(void)
+{
+       struct iomuxc_gpr_base_regs *gpr =
+               (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
+
+       /* Use 125M anatop REF_CLK1 for ENET1, not from external */
+       clrsetbits_le32(&gpr->gpr[1], 0x2000, 0);
+}
+
+int board_phy_config(struct phy_device *phydev)
+{
+       /* enable rgmii rxc skew and phy mode select to RGMII copper */
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
+
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00);
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee);
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
+
+       if (phydev->drv->config)
+               phydev->drv->config(phydev);
        return 0;
 }
 
-int board_mmc_get_env_dev(int devno)
+int board_init(void)
 {
-       return devno;
+       setup_fec();
+
+       return 0;
 }
 
 int board_late_init(void)
index 4f943a6..27bf5ec 100644 (file)
@@ -65,7 +65,12 @@ CONFIG_MMC_HS400_ES_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
 CONFIG_FSL_USDHC=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_DM_ETH=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_PHY_GIGE=y
+CONFIG_FEC_MXC=y
+CONFIG_MII=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_IMX8M=y