pinctrl: renesas: r8a779f0: Add MMC pins, groups, and function

Add pins, groups, and function for the MMC interface on the Renesas
R-Car S4-8 (R8A779F0) SoC.

Based on a larger patch in the BSP by LUU HOAI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/81a35c1fac4616d25501942848eb9662d477f9ef.1645457792.git.geert+renesas@glider.be

diff --git a/drivers/pinctrl/renesas/pfc-r8a779f0.c b/drivers/pinctrl/renesas/pfc-r8a779f0.c
index de7878f..6fbe42e 100644 (file)
--- a/drivers/pinctrl/renesas/pfc-r8a779f0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779f0.c
@@ -679,6 +679,49 @@ static const unsigned int intc_ex_irq5_mux[] = {
        IRQ5_MARK,
 };
 
+/* - MMC -------------------------------------------------------------------- */
+static const unsigned int mmc_data_pins[] = {
+       /* MMC_SD_D[0:3], MMC_D[4:7] */
+       RCAR_GP_PIN(1, 13), RCAR_GP_PIN(1, 14),
+       RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 16),
+       RCAR_GP_PIN(1, 18), RCAR_GP_PIN(1, 17),
+       RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 21),
+};
+static const unsigned int mmc_data_mux[] = {
+       MMC_SD_D0_MARK, MMC_SD_D1_MARK,
+       MMC_SD_D2_MARK, MMC_SD_D3_MARK,
+       MMC_D4_MARK, MMC_D5_MARK,
+       MMC_D6_MARK, MMC_D7_MARK,
+};
+static const unsigned int mmc_ctrl_pins[] = {
+       /* MMC_SD_CLK, MMC_SD_CMD */
+       RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 22),
+};
+static const unsigned int mmc_ctrl_mux[] = {
+       MMC_SD_CLK_MARK, MMC_SD_CMD_MARK,
+};
+static const unsigned int mmc_cd_pins[] = {
+       /* SD_CD */
+       RCAR_GP_PIN(1, 23),
+};
+static const unsigned int mmc_cd_mux[] = {
+       SD_CD_MARK,
+};
+static const unsigned int mmc_wp_pins[] = {
+       /* SD_WP */
+       RCAR_GP_PIN(1, 24),
+};
+static const unsigned int mmc_wp_mux[] = {
+       SD_WP_MARK,
+};
+static const unsigned int mmc_ds_pins[] = {
+       /* MMC_DS */
+       RCAR_GP_PIN(1, 20),
+};
+static const unsigned int mmc_ds_mux[] = {
+       MMC_DS_MARK,
+};
+
 /* - SCIF0 ------------------------------------------------------------------ */
 static const unsigned int scif0_data_pins[] = {
        /* RX0, TX0 */
@@ -805,6 +848,13 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
        SH_PFC_PIN_GROUP(intc_ex_irq3),
        SH_PFC_PIN_GROUP(intc_ex_irq4),
        SH_PFC_PIN_GROUP(intc_ex_irq5),
+       BUS_DATA_PIN_GROUP(mmc_data, 1),
+       BUS_DATA_PIN_GROUP(mmc_data, 4),
+       BUS_DATA_PIN_GROUP(mmc_data, 8),
+       SH_PFC_PIN_GROUP(mmc_ctrl),
+       SH_PFC_PIN_GROUP(mmc_cd),
+       SH_PFC_PIN_GROUP(mmc_wp),
+       SH_PFC_PIN_GROUP(mmc_ds),
        SH_PFC_PIN_GROUP(scif0_data),
        SH_PFC_PIN_GROUP(scif0_clk),
        SH_PFC_PIN_GROUP(scif0_ctrl),
@@ -877,6 +927,16 @@ static const char * const intc_ex_groups[] = {
        "intc_ex_irq5",
 };
 
+static const char * const mmc_groups[] = {
+       "mmc_data1",
+       "mmc_data4",
+       "mmc_data8",
+       "mmc_ctrl",
+       "mmc_cd",
+       "mmc_wp",
+       "mmc_ds",
+};
+
 static const char * const scif0_groups[] = {
        "scif0_data",
        "scif0_clk",
@@ -917,6 +977,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
        SH_PFC_FUNCTION(i2c4),
        SH_PFC_FUNCTION(i2c5),
        SH_PFC_FUNCTION(intc_ex),
+       SH_PFC_FUNCTION(mmc),
        SH_PFC_FUNCTION(scif0),
        SH_PFC_FUNCTION(scif1),
        SH_PFC_FUNCTION(scif3),