iris: Make iris_query.c a genxml-compiled file.

This will let us use Jason's new MI-builder shortly.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>

diff --git a/src/gallium/drivers/iris/iris_context.c b/src/gallium/drivers/iris/iris_context.c
index 8eb8016..a0f3aa8 100644 (file)
--- a/src/gallium/drivers/iris/iris_context.c
+++ b/src/gallium/drivers/iris/iris_context.c
@@ -268,7 +268,6 @@ iris_create_context(struct pipe_screen *pscreen, void *priv, unsigned flags)
    iris_init_clear_functions(ctx);
    iris_init_program_functions(ctx);
    iris_init_resource_functions(ctx);
-   iris_init_query_functions(ctx);
    iris_init_flush_functions(ctx);
 
    iris_init_program_cache(ice);
@@ -290,6 +289,7 @@ iris_create_context(struct pipe_screen *pscreen, void *priv, unsigned flags)
 
    genX_call(devinfo, init_state, ice);
    genX_call(devinfo, init_blorp, ice);
+   genX_call(devinfo, init_query, ice);
 
    int priority = 0;
    if (flags & PIPE_CONTEXT_HIGH_PRIORITY)

diff --git a/src/gallium/drivers/iris/iris_context.h b/src/gallium/drivers/iris/iris_context.h
index 5161cb8..123b56f 100644 (file)
--- a/src/gallium/drivers/iris/iris_context.h
+++ b/src/gallium/drivers/iris/iris_context.h
@@ -739,7 +739,6 @@ void iris_init_blit_functions(struct pipe_context *ctx);
 void iris_init_clear_functions(struct pipe_context *ctx);
 void iris_init_program_functions(struct pipe_context *ctx);
 void iris_init_resource_functions(struct pipe_context *ctx);
-void iris_init_query_functions(struct pipe_context *ctx);
 void iris_update_compiled_shaders(struct iris_context *ice);
 void iris_update_compiled_compute_shader(struct iris_context *ice);
 void iris_fill_cs_push_const_buffer(struct brw_cs_prog_data *cs_prog_data,

diff --git a/src/gallium/drivers/iris/iris_genx_protos.h b/src/gallium/drivers/iris/iris_genx_protos.h
index 163af43..623eb6b 100644 (file)
--- a/src/gallium/drivers/iris/iris_genx_protos.h
+++ b/src/gallium/drivers/iris/iris_genx_protos.h
@@ -37,3 +37,12 @@ void genX(emit_urb_setup)(struct iris_context *ice,
 /* iris_blorp.c */
 void genX(init_blorp)(struct iris_context *ice);
 
+/* iris_query.c */
+void genX(init_query)(struct iris_context *ice);
+void genX(math_add32_gpr0)(struct iris_context *ice,
+                           struct iris_batch *batch,
+                           uint32_t x);
+void genX(math_div32_gpr0)(struct iris_context *ice,
+                           struct iris_batch *batch,
+                           uint32_t D);
+

diff --git a/src/gallium/drivers/iris/iris_query.c b/src/gallium/drivers/iris/iris_query.c
index 08439ed..756d916 100644 (file)
--- a/src/gallium/drivers/iris/iris_query.c
+++ b/src/gallium/drivers/iris/iris_query.c
@@ -23,8 +23,12 @@
 /**
  * @file iris_query.c
  *
+ * ============================= GENXML CODE =============================
+ *              [This file is compiled once per generation.]
+ * =======================================================================
+ *
  * Query object support.  This allows measuring various simple statistics
- * via counters on the GPU.
+ * via counters on the GPU.  We use GenX code for MI_MATH calculations.
  */
 
 #include <stdio.h>
@@ -43,43 +47,13 @@
 #include "iris_screen.h"
 #include "vulkan/util/vk_util.h"
 
-#define IA_VERTICES_COUNT          0x2310
-#define IA_PRIMITIVES_COUNT        0x2318
-#define VS_INVOCATION_COUNT        0x2320
-#define HS_INVOCATION_COUNT        0x2300
-#define DS_INVOCATION_COUNT        0x2308
-#define GS_INVOCATION_COUNT        0x2328
-#define GS_PRIMITIVES_COUNT        0x2330
-#define CL_INVOCATION_COUNT        0x2338
-#define CL_PRIMITIVES_COUNT        0x2340
-#define PS_INVOCATION_COUNT        0x2348
-#define CS_INVOCATION_COUNT        0x2290
-#define PS_DEPTH_COUNT             0x2350
-
-#define SO_PRIM_STORAGE_NEEDED(n)  (0x5240 + (n) * 8)
+#include "iris_genx_macros.h"
 
-#define SO_NUM_PRIMS_WRITTEN(n)    (0x5200 + (n) * 8)
+#define SO_PRIM_STORAGE_NEEDED(n) (GENX(SO_PRIM_STORAGE_NEEDED0_num) + (n) * 8)
+#define SO_NUM_PRIMS_WRITTEN(n)   (GENX(SO_NUM_PRIMS_WRITTEN0_num) + (n) * 8)
 
 #define MI_MATH (0x1a << 23)
 
-#define MI_ALU_LOAD      0x080
-#define MI_ALU_LOADINV   0x480
-#define MI_ALU_LOAD0     0x081
-#define MI_ALU_LOAD1     0x481
-#define MI_ALU_ADD       0x100
-#define MI_ALU_SUB       0x101
-#define MI_ALU_AND       0x102
-#define MI_ALU_OR        0x103
-#define MI_ALU_XOR       0x104
-#define MI_ALU_STORE     0x180
-#define MI_ALU_STOREINV  0x580
-
-#define MI_ALU_SRCA      0x20
-#define MI_ALU_SRCB      0x21
-#define MI_ALU_ACCU      0x31
-#define MI_ALU_ZF        0x32
-#define MI_ALU_CF        0x33
-
 #define emit_lri32 ice->vtbl.load_register_imm32
 #define emit_lri64 ice->vtbl.load_register_imm64
 #define emit_lrr32 ice->vtbl.load_register_reg32
@@ -173,7 +147,7 @@ iris_pipelined_write(struct iris_batch *batch,
 {
    const struct gen_device_info *devinfo = &batch->screen->devinfo;
    const unsigned optional_cs_stall =
-      devinfo->gen == 9 && devinfo->gt == 4 ?  PIPE_CONTROL_CS_STALL : 0;
+      GEN_GEN == 9 && devinfo->gt == 4 ?  PIPE_CONTROL_CS_STALL : 0;
    struct iris_bo *bo = iris_resource_bo(q->query_state_ref.res);
 
    iris_emit_pipe_control_write(batch, "query: pipelined snapshot write",
@@ -185,7 +159,6 @@ static void
 write_value(struct iris_context *ice, struct iris_query *q, unsigned offset)
 {
    struct iris_batch *batch = &ice->batches[q->batch_idx];
-   const struct gen_device_info *devinfo = &batch->screen->devinfo;
    struct iris_bo *bo = iris_resource_bo(q->query_state_ref.res);
 
    if (!iris_is_query_pipelined(q)) {
@@ -200,7 +173,7 @@ write_value(struct iris_context *ice, struct iris_query *q, unsigned offset)
    case PIPE_QUERY_OCCLUSION_COUNTER:
    case PIPE_QUERY_OCCLUSION_PREDICATE:
    case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
-      if (devinfo->gen >= 10) {
+      if (GEN_GEN >= 10) {
          /* "Driver must program PIPE_CONTROL with only Depth Stall Enable
           *  bit set prior to programming a PIPE_CONTROL with Write PS Depth
           *  Count sync operation."
@@ -224,7 +197,8 @@ write_value(struct iris_context *ice, struct iris_query *q, unsigned offset)
       break;
    case PIPE_QUERY_PRIMITIVES_GENERATED:
       ice->vtbl.store_register_mem64(batch,
-                                     q->index == 0 ? CL_INVOCATION_COUNT :
+                                     q->index == 0 ?
+                                     GENX(CL_INVOCATION_COUNT_num) :
                                      SO_PRIM_STORAGE_NEEDED(q->index),
                                      bo, offset, false);
       break;
@@ -235,17 +209,17 @@ write_value(struct iris_context *ice, struct iris_query *q, unsigned offset)
       break;
    case PIPE_QUERY_PIPELINE_STATISTICS_SINGLE: {
       static const uint32_t index_to_reg[] = {
-         IA_VERTICES_COUNT,
-         IA_PRIMITIVES_COUNT,
-         VS_INVOCATION_COUNT,
-         GS_INVOCATION_COUNT,
-         GS_PRIMITIVES_COUNT,
-         CL_INVOCATION_COUNT,
-         CL_PRIMITIVES_COUNT,
-         PS_INVOCATION_COUNT,
-         HS_INVOCATION_COUNT,
-         DS_INVOCATION_COUNT,
-         CS_INVOCATION_COUNT,
+         GENX(IA_VERTICES_COUNT_num),
+         GENX(IA_PRIMITIVES_COUNT_num),
+         GENX(VS_INVOCATION_COUNT_num),
+         GENX(GS_INVOCATION_COUNT_num),
+         GENX(GS_PRIMITIVES_COUNT_num),
+         GENX(CL_INVOCATION_COUNT_num),
+         GENX(CL_PRIMITIVES_COUNT_num),
+         GENX(PS_INVOCATION_COUNT_num),
+         GENX(HS_INVOCATION_COUNT_num),
+         GENX(DS_INVOCATION_COUNT_num),
+         GENX(CS_INVOCATION_COUNT_num),
       };
       const uint32_t reg = index_to_reg[q->index];
 
@@ -332,7 +306,7 @@ calculate_result_on_cpu(const struct gen_device_info *devinfo,
       q->result = q->map->end - q->map->start;
 
       /* WaDividePSInvocationCountBy4:HSW,BDW */
-      if (devinfo->gen == 8 && q->index == PIPE_STAT_QUERY_PS_INVOCATIONS)
+      if (GEN_GEN == 8 && q->index == PIPE_STAT_QUERY_PS_INVOCATIONS)
          q->result /= 4;
       break;
    case PIPE_QUERY_OCCLUSION_COUNTER:
@@ -429,9 +403,9 @@ emit_mul_gpr0(struct iris_batch *batch, uint32_t N)
 }
 
 void
-iris_math_div32_gpr0(struct iris_context *ice,
-                     struct iris_batch *batch,
-                     uint32_t D)
+genX(math_div32_gpr0)(struct iris_context *ice,
+                      struct iris_batch *batch,
+                      uint32_t D)
 {
    /* Zero out the top of GPR0 */
    emit_lri32(batch, CS_GPR(0) + 4, 0);
@@ -489,9 +463,9 @@ iris_math_div32_gpr0(struct iris_context *ice,
 }
 
 void
-iris_math_add32_gpr0(struct iris_context *ice,
-                     struct iris_batch *batch,
-                     uint32_t x)
+genX(math_add32_gpr0)(struct iris_context *ice,
+                      struct iris_batch *batch,
+                      uint32_t x)
 {
    emit_lri32(batch, CS_GPR(1), x);
    emit_alu_add(batch, MI_ALU_R0, MI_ALU_R0, MI_ALU_R1);
@@ -710,7 +684,7 @@ calculate_result_on_gpu(struct iris_context *ice, struct iris_query *q)
    iris_batch_emit(batch, math, sizeof(math));
 
    /* WaDividePSInvocationCountBy4:HSW,BDW */
-   if (devinfo->gen == 8 &&
+   if (GEN_GEN == 8 &&
        q->type == PIPE_QUERY_PIPELINE_STATISTICS_SINGLE &&
        q->index == PIPE_STAT_QUERY_PS_INVOCATIONS)
       shr_gpr0_by_2_bits(ice);
@@ -1111,9 +1085,9 @@ iris_resolve_conditional_render(struct iris_context *ice)
 }
 
 void
-iris_init_query_functions(struct pipe_context *ctx)
+genX(init_query)(struct iris_context *ice)
 {
-   struct iris_context *ice = (void *) ctx;
+   struct pipe_context *ctx = &ice->ctx;
 
    ctx->create_query = iris_create_query;
    ctx->destroy_query = iris_destroy_query;

diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index 3fa8b07..056ab56 100644 (file)
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -5336,9 +5336,11 @@ iris_upload_render_state(struct iris_context *ice,
          lrm.MemoryAddress =
             ro_bo(iris_resource_bo(so->offset.res), so->offset.offset);
       }
+
       if (so->base.buffer_offset)
-         iris_math_add32_gpr0(ice, batch, -so->base.buffer_offset);
-      iris_math_div32_gpr0(ice, batch, so->stride);
+         genX(math_add32_gpr0)(ice, batch, -so->base.buffer_offset);
+      genX(math_div32_gpr0)(ice, batch, so->stride);
+
       _iris_emit_lrr(batch, _3DPRIM_VERTEX_COUNT, CS_GPR(0));
 
       _iris_emit_lri(batch, _3DPRIM_START_VERTEX, 0);

diff --git a/src/gallium/drivers/iris/meson.build b/src/gallium/drivers/iris/meson.build
index b9b99a0..6b6263c 100644 (file)
--- a/src/gallium/drivers/iris/meson.build
+++ b/src/gallium/drivers/iris/meson.build
@@ -41,7 +41,6 @@ files_libiris = files(
   'iris_pipe_control.c',
   'iris_program.c',
   'iris_program_cache.c',
-  'iris_query.c',
   'iris_resolve.c',
   'iris_resource.c',
   'iris_resource.h',
@@ -65,7 +64,7 @@ iris_gen_libs = []
 foreach v : ['80', '90', '100', '110']
   iris_gen_libs += static_library(
     'libiris_gen@0@'.format(v),
-    ['iris_blorp.c', 'iris_state.c', gen_xml_pack],
+    ['iris_blorp.c', 'iris_query.c', 'iris_state.c', gen_xml_pack],
     include_directories : [inc_common, inc_intel, inc_nir],
     c_args : [
       c_vis_args, no_override_init_args, c_sse2_args,