drm/amd/display: fix type of variable
authorGustavo A. R. Silva <gustavo@embeddedor.com>
Fri, 15 Jun 2018 13:32:28 +0000 (08:32 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 15 Jun 2018 16:47:15 +0000 (11:47 -0500)
Currently, the maximum value that *counter* can reach is 255, and
code at line 150: while (counter < 1000) { implies a bigger value
could be expected.

Fix this by changing the type of variable *counter* from uint8_t
to uint16_t.

Addresses-Coverity-ID: 1470030 ("Operands don't affect result")
Fixes: 2b6199a1d1b7 ("drm/amd/display: replace msleep with udelay in fbc path")
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c

index e2994d3..111c492 100644 (file)
@@ -143,7 +143,7 @@ static void wait_for_fbc_state_changed(
        struct dce110_compressor *cp110,
        bool enabled)
 {
-       uint8_t counter = 0;
+       uint16_t counter = 0;
        uint32_t addr = mmFBC_STATUS;
        uint32_t value;