crypto: qat - replace constant masks with GENMASK
authorGiovanni Cabiddu <giovanni.cabiddu@intel.com>
Mon, 12 Oct 2020 20:38:36 +0000 (21:38 +0100)
committerHerbert Xu <herbert@gondor.apana.org.au>
Fri, 30 Oct 2020 06:34:55 +0000 (17:34 +1100)
Replace constant 0xFFFFFFFFFFFFFFFFULL with GENMASK_ULL(63, 0) and
0xFFFFFFFF with GENMASK(31, 0) as they are masks.
This makes code less error prone.

Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/qat/qat_common/adf_gen2_hw_data.h
drivers/crypto/qat/qat_common/adf_sriov.c

index 212ff39..04236a4 100644 (file)
@@ -24,7 +24,7 @@
 #define ADF_RING_BUNDLE_SIZE           0x1000
 
 #define BUILD_RING_BASE_ADDR(addr, size) \
-       (((addr) >> 6) & (0xFFFFFFFFFFFFFFFFULL << (size)))
+       (((addr) >> 6) & (GENMASK_ULL(63, 0) << (size)))
 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \
        ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
                   ADF_RING_CSR_RING_HEAD + ((ring) << 2))
index dde6c57..0e8eab0 100644 (file)
@@ -99,7 +99,7 @@ void adf_disable_sriov(struct adf_accel_dev *accel_dev)
        pci_disable_sriov(accel_to_pci_dev(accel_dev));
 
        /* Disable VF to PF interrupts */
-       adf_disable_vf2pf_interrupts(accel_dev, 0xFFFFFFFF);
+       adf_disable_vf2pf_interrupts(accel_dev, GENMASK(31, 0));
 
        /* Clear Valid bits in AE Thread to PCIe Function Mapping */
        hw_data->configure_iov_threads(accel_dev, false);