arm64: dts: qcom: sm6375: Add ADSP&CDSP

Add ADSP & CDSP remote processors.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221114105913.37044-3-konrad.dybcio@linaro.org

diff --git a/arch/arm64/boot/dts/qcom/sm6375.dtsi b/arch/arm64/boot/dts/qcom/sm6375.dtsi
index 9c3854b..12cf5db 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm6375.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6375.dtsi
@@ -1155,6 +1155,79 @@
                        };
                };
 
+               remoteproc_adsp: remoteproc@a400000 {
+                       compatible = "qcom,sm6375-adsp-pas";
+                       reg = <0 0x0a400000 0 0x100>;
+
+                       interrupts-extended = <&intc GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
+                                             <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
+                                             <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
+                                             <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "wdog", "fatal", "ready",
+                                         "handover", "stop-ack";
+
+                       clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
+                       clock-names = "xo";
+
+                       power-domains = <&rpmpd SM6375_VDD_LPI_CX>,
+                                       <&rpmpd SM6375_VDD_LPI_MX>;
+                       power-domain-names = "lcx", "lmx";
+
+                       memory-region = <&pil_adsp_mem>;
+
+                       qcom,smem-states = <&smp2p_adsp_out 0>;
+                       qcom,smem-state-names = "stop";
+
+                       status = "disabled";
+
+                       glink-edge {
+                               interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
+                                                            IPCC_MPROC_SIGNAL_GLINK_QMP
+                                                            IRQ_TYPE_EDGE_RISING>;
+                               mboxes = <&ipcc IPCC_CLIENT_LPASS
+                                               IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+                               label = "lpass";
+                               qcom,remote-pid = <2>;
+                       };
+               };
+
+               remoteproc_cdsp: remoteproc@b000000 {
+                       compatible = "qcom,sm6375-cdsp-pas";
+                       reg = <0x0 0x0b000000 0x0 0x100000>;
+
+                       interrupts-extended = <&intc GIC_SPI 265 IRQ_TYPE_EDGE_RISING>,
+                                             <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,
+                                             <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
+                                             <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>,
+                                             <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "wdog", "fatal", "ready",
+                                         "handover", "stop-ack";
+
+                       clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
+                       clock-names = "xo";
+
+                       power-domains = <&rpmpd SM6375_VDDCX>;
+
+                       memory-region = <&pil_cdsp_mem>;
+
+                       qcom,smem-states = <&smp2p_cdsp_out 0>;
+                       qcom,smem-state-names = "stop";
+
+                       status = "disabled";
+
+                       glink-edge {
+                               interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
+                                                            IPCC_MPROC_SIGNAL_GLINK_QMP
+                                                            IRQ_TYPE_EDGE_RISING>;
+                               mboxes = <&ipcc IPCC_CLIENT_CDSP
+                                               IPCC_MPROC_SIGNAL_GLINK_QMP>;
+                               label = "cdsp";
+                               qcom,remote-pid = <5>;
+                       };
+               };
+
                apps_smmu: iommu@c600000 {
                        compatible = "qcom,sm6375-smmu-500", "arm,mmu-500";
                        reg = <0 0x0c600000 0 0x100000>;