ARM: dts: imx50: imx50-esdhc use imx53-esdhc
authorAlexander Kurz <akurz@blala.de>
Thu, 2 Mar 2017 21:03:48 +0000 (22:03 +0100)
committerShawn Guo <shawnguo@kernel.org>
Mon, 10 Apr 2017 08:16:03 +0000 (16:16 +0800)
According to the reference manuals, both imx50/imx53 SOC seem to share
the same eSDHC controller, especially the section on "Multi-block Read"
mentioned in commit 361b8482026c ("mmc: sdhci-esdhc-imx: fix multiblock
reads on i.MX53") is identical for both SOC.
Hence, let imx50 use imx53-esdhc.

Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/imx50.dtsi

index ceae909..2a98afc 100644 (file)
                                ranges;
 
                                esdhc1: esdhc@50004000 {
-                                       compatible = "fsl,imx50-esdhc";
+                                       compatible = "fsl,imx50-esdhc", "fsl,imx53-esdhc";
                                        reg = <0x50004000 0x4000>;
                                        interrupts = <1>;
                                        clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>,
                                };
 
                                esdhc2: esdhc@50008000 {
-                                       compatible = "fsl,imx50-esdhc";
+                                       compatible = "fsl,imx50-esdhc", "fsl,imx53-esdhc";
                                        reg = <0x50008000 0x4000>;
                                        interrupts = <2>;
                                        clocks = <&clks IMX5_CLK_ESDHC2_IPG_GATE>,
                                };
 
                                esdhc3: esdhc@50020000 {
-                                       compatible = "fsl,imx50-esdhc";
+                                       compatible = "fsl,imx50-esdhc", "fsl,imx53-esdhc";
                                        reg = <0x50020000 0x4000>;
                                        interrupts = <3>;
                                        clocks = <&clks IMX5_CLK_ESDHC3_IPG_GATE>,
                                };
 
                                esdhc4: esdhc@50024000 {
-                                       compatible = "fsl,imx50-esdhc";
+                                       compatible = "fsl,imx50-esdhc", "fsl,imx53-esdhc";
                                        reg = <0x50024000 0x4000>;
                                        interrupts = <4>;
                                        clocks = <&clks IMX5_CLK_ESDHC4_IPG_GATE>,